From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Tinghan Shen <tinghan.shen@mediatek.com>,
Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
Will Deacon <will@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Lee Jones <lee.jones@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
MandyJH Liu <mandyjh.liu@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>
Cc: iommu@lists.linux.dev, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH v2 05/19] dt-bindings: power: mediatek: Refine multiple level power domain nodes
Date: Fri, 15 Jul 2022 10:07:40 +0200 [thread overview]
Message-ID: <c2e9f890-98c2-8f09-952d-495f2b57a254@linaro.org> (raw)
In-Reply-To: <20220714122837.20094-6-tinghan.shen@mediatek.com>
On 14/07/2022 14:28, Tinghan Shen wrote:
> Extract duplicated properties and support more levels of power
> domain nodes.
>
> This change fix following error when do dtbs_check,
> arch/arm64/boot/dts/mediatek/mt8195-evb.dtb: power-controller: power-domain@15:power-domain@16:power-domain@18: 'power-domain@19', 'power-domain@20', 'power-domain@21' do not match any of the regexes: 'pinctrl-[0-9]+'
> From schema: Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
>
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
> ---
> .../power/mediatek,power-controller.yaml | 119 +-----------------
> 1 file changed, 6 insertions(+), 113 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> index be81cd97afa4..e5494a330716 100644
> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> @@ -42,6 +42,10 @@ properties:
>
> patternProperties:
> "^power-domain@[0-9a-f]+$":
> + $ref: "#/$defs/power-domain-node"
> +
> +$defs:
> + power-domain-node:
> type: object
> description: |
> Represents the power domains within the power controller node as documented
> @@ -100,122 +104,11 @@ patternProperties:
> $ref: /schemas/types.yaml#/definitions/phandle
> description: phandle to the device containing the SMI register range.
>
> - patternProperties:
> - "^power-domain@[0-9a-f]+$":
> - type: object
> - description: |
> - Represents a power domain child within a power domain parent node.
> -
> - properties:
> -
> - '#power-domain-cells':
> - description:
> - Must be 0 for nodes representing a single PM domain and 1 for nodes
> - providing multiple PM domains.
> -
> - '#address-cells':
> - const: 1
> -
> - '#size-cells':
> - const: 0
> -
> - reg:
> - maxItems: 1
> -
> - clocks:
> - description: |
> - A number of phandles to clocks that need to be enabled during domain
> - power-up sequencing.
> -
> - clock-names:
> - description: |
> - List of names of clocks, in order to match the power-up sequencing
> - for each power domain we need to group the clocks by name. BASIC
> - clocks need to be enabled before enabling the corresponding power
> - domain, and should not have a '-' in their name (i.e mm, mfg, venc).
> - SUSBYS clocks need to be enabled before releasing the bus protection,
> - and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
> -
> - In order to follow properly the power-up sequencing, the clocks must
> - be specified by order, adding first the BASIC clocks followed by the
> - SUSBSYS clocks.
> -
> - domain-supply:
> - description: domain regulator supply.
> -
> - mediatek,infracfg:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the device containing the INFRACFG register range.
> -
> - mediatek,smi:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the device containing the SMI register range.
> -
> - patternProperties:
> - "^power-domain@[0-9a-f]+$":
> - type: object
> - description: |
> - Represents a power domain child within a power domain parent node.
> -
> - properties:
> -
> - '#power-domain-cells':
> - description:
> - Must be 0 for nodes representing a single PM domain and 1 for nodes
> - providing multiple PM domains.
> -
> - '#address-cells':
> - const: 1
> -
> - '#size-cells':
> - const: 0
> -
> - reg:
> - maxItems: 1
> -
> - clocks:
> - description: |
> - A number of phandles to clocks that need to be enabled during domain
> - power-up sequencing.
> -
> - clock-names:
> - description: |
> - List of names of clocks, in order to match the power-up sequencing
> - for each power domain we need to group the clocks by name. BASIC
> - clocks need to be enabled before enabling the corresponding power
> - domain, and should not have a '-' in their name (i.e mm, mfg, venc).
> - SUSBYS clocks need to be enabled before releasing the bus protection,
> - and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
> -
> - In order to follow properly the power-up sequencing, the clocks must
> - be specified by order, adding first the BASIC clocks followed by the
> - SUSBSYS clocks.
> -
> - domain-supply:
> - description: domain regulator supply.
> -
> - mediatek,infracfg:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the device containing the INFRACFG register range.
> -
> - mediatek,smi:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the device containing the SMI register range.
> -
> - required:
> - - reg
> -
> - additionalProperties: false
> -
> - required:
> - - reg
> -
> - additionalProperties: false
> -
> required:
> - reg
>
> - additionalProperties: false
> + additionalProperties:
> + $ref: "#/$defs/power-domain-node"
That's an interesting construction - endless recurrence. I did not know
it works like that... How about making it a bit more specific? Defining
defs "power-domain-node" for just one child (without
additionalProperties piece) and (maybe with just one more level):
@@ -43,6 +43,12 @@ patternProperties:
"^power-domain@[0-9a-f]+$":
$ref: "#/$defs/power-domain-node"
+ patternProperties:
+ "^power-domain@[0-9a-f]+$":
+ $ref: "#/$defs/power-domain-node"
+ unevaluatedProperties: false
+ unevaluatedProperties: false
+
$defs:
power-domain-node:
type: object
@@ -105,9 +111,6 @@ $defs:
required:
- reg
- additionalProperties:
- $ref: "#/$defs/power-domain-node"
-
required:
- compatible
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-15 8:07 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 12:28 [PATCH v2 00/19] Add driver nodes for MT8195 SoC Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 01/19] dt-bindings: iommu: mediatek: Increase max interrupt number Tinghan Shen
2022-07-15 7:34 ` Krzysztof Kozlowski
2022-07-14 12:28 ` [PATCH v2 02/19] dt-bindings: memory: mediatek: Update condition for mt8195 smi node Tinghan Shen
2022-07-14 12:36 ` AngeloGioacchino Del Regno
2022-07-15 7:35 ` Krzysztof Kozlowski
2022-07-14 12:28 ` [PATCH v2 03/19] dt-bindings: power: mediatek: Add bindings for MediaTek SCPSYS Tinghan Shen
2022-07-14 13:38 ` Lee Jones
2022-07-15 7:57 ` Krzysztof Kozlowski
2022-07-19 8:17 ` Tinghan Shen
2022-07-19 8:50 ` Krzysztof Kozlowski
2022-07-18 21:15 ` Rob Herring
2022-07-14 12:28 ` [PATCH v2 04/19] dt-bindings: power: mediatek: Update example in dt-bindings Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 05/19] dt-bindings: power: mediatek: Refine multiple level power domain nodes Tinghan Shen
2022-07-15 8:07 ` Krzysztof Kozlowski [this message]
2022-07-15 8:15 ` Krzysztof Kozlowski
2022-07-19 7:55 ` Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 06/19] arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 07/19] arm64: dts: mt8195: Disable watchdog external reset signal Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 08/19] arm64: dts: mt8195: Disable I2C0 node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 09/19] arm64: dts: mt8195: Add cpufreq node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 10/19] arm64: dts: mt8195: Add vdosys and vppsys clock nodes Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 11/19] arm64: dts: mt8195: Add power domains controller Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 12/19] arm64: dts: mt8195: Add spmi node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 13/19] arm64: dts: mt8195: Add scp node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 14/19] arm64: dts: mt8195: Add audio related nodes Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 15/19] arm64: dts: mt8195: Add adsp node and adsp mailbox nodes Tinghan Shen
2022-07-14 12:35 ` AngeloGioacchino Del Regno
2022-07-14 12:28 ` [PATCH v2 16/19] arm64: dts: mt8195: Specify audio reset controller Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 17/19] arm64: dts: mt8195: Add iommu and smi nodes Tinghan Shen
[not found] ` <20220714122837.20094-20-tinghan.shen@mediatek.com>
2022-07-14 12:36 ` [PATCH v2 19/19] arm64: dts: mt8195: Add display node for vdosys0 AngeloGioacchino Del Regno
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