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Fri, 10 Jul 2020 06:41:03 -0700 (PDT) Subject: Re: [PATCH v7 6/7] clk: mediatek: add UART0 clock support To: Hanks Chen , Linus Walleij , Rob Herring , Michael Turquette , Stephen Boyd , Sean Wang Cc: mtk01761 , Andy Teng , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, wsd_upstream@mediatek.com, CC Hwang , Loda Chou References: <1593694630-26604-1-git-send-email-hanks.chen@mediatek.com> <1593694630-26604-8-git-send-email-hanks.chen@mediatek.com> From: Matthias Brugger Message-ID: Date: Fri, 10 Jul 2020 15:41:01 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <1593694630-26604-8-git-send-email-hanks.chen@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 02/07/2020 14:57, Hanks Chen wrote: > Add MT6779 UART0 clock support. > > Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") > Signed-off-by: Wendell Lin > Signed-off-by: Hanks Chen Reviewed-by: Matthias Brugger > --- > drivers/clk/mediatek/clk-mt6779.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c > index 9766ccc..6e0d3a1 100644 > --- a/drivers/clk/mediatek/clk-mt6779.c > +++ b/drivers/clk/mediatek/clk-mt6779.c > @@ -919,6 +919,8 @@ > "pwm_sel", 19), > GATE_INFRA0(CLK_INFRA_PWM, "infra_pwm", > "pwm_sel", 21), > + GATE_INFRA0(CLK_INFRA_UART0, "infra_uart0", > + "uart_sel", 22), > GATE_INFRA0(CLK_INFRA_UART1, "infra_uart1", > "uart_sel", 23), > GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2", >