From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: Re: [PATCH net-next v3 05/11] net: mscc: ocelot: simplify register access for PLL5 configuration Date: Fri, 14 Sep 2018 19:26:41 -0700 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Quentin Schulz , alexandre.belloni@bootlin.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, davem@davemloft.net, kishon@ti.com, andrew@lunn.ch Cc: allan.nielsen@microchip.com, linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, thomas.petazzoni@bootlin.com List-Id: devicetree@vger.kernel.org On 09/14/18 01:16, Quentin Schulz wrote: > Since HSIO address space can be accessed by different drivers, let's > simplify the register address definitions so that it can be easily used > by all drivers and put the register address definition in the > include/soc/mscc/ocelot_hsio.h header file. > > Acked-by: Alexandre Belloni > Signed-off-by: Quentin Schulz Reviewed-by: Florian Fainelli -- Florian