From: Stephen Boyd <sboyd@kernel.org>
To: Nuno Sa <nuno.sa@analog.com>,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Lars-Peter Clausen <lars@metafoo.de>
Subject: Re: [PATCH v2 2/2] clk: clk-axi-clkgen: make sure to enable the AXI bus clock
Date: Thu, 14 Nov 2024 14:45:58 -0800 [thread overview]
Message-ID: <c44cd4a76bd7100587e96d5e979ed8f8.sboyd@kernel.org> (raw)
In-Reply-To: <20241029-axi-clkgen-fix-axiclk-v2-2-bc5e0733ad76@analog.com>
Quoting Nuno Sa (2024-10-29 06:59:42)
> In order to access the registers of the HW, we need to make sure that
> the AXI bus clock is enabled. Hence let's increase the number of clocks
> by one.
>
> In order to keep backward compatibility and make sure old DTs still work
> we check if clock-names is available or not. If it is, then we can
> disambiguate between really having the AXI clock or a parent clock and
> so we can enable the bus clock. If not, we fallback to what was done
> before and don't explicitly enable the AXI bus clock.
>
> Note that if clock-names is given, the axi clock must be the last one in
> the phandle array (also enforced in the DT bindings) so that we can reuse
> as much code as possible.
>
> Fixes: 0e646c52cf0e ("clk: Add axi-clkgen driver")
> Signed-off-by: Nuno Sa <nuno.sa@analog.com>
> ---
Applied to clk-next
prev parent reply other threads:[~2024-11-14 22:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 13:59 [PATCH v2 0/2] clk: clk-axi-clkgen: make sure to enable the AXI bus clock Nuno Sa
2024-10-29 13:59 ` [PATCH v2 1/2] dt-bindings: clock: axi-clkgen: include AXI clk Nuno Sa
2024-10-31 13:09 ` Conor Dooley
2024-11-14 22:45 ` Stephen Boyd
2024-10-29 13:59 ` [PATCH v2 2/2] clk: clk-axi-clkgen: make sure to enable the AXI bus clock Nuno Sa
2024-11-14 22:45 ` Stephen Boyd [this message]
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