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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5ceac74d485sm847824a12.19.2024.10.31.13.09.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 31 Oct 2024 13:09:27 -0700 (PDT) Message-ID: Date: Thu, 31 Oct 2024 21:09:24 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/5] arm64: dts: qcom: x1e80100-crd: add rtc offset to set rtc time To: Jonathan Marek , linux-arm-msm@vger.kernel.org Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20241015004945.3676-1-jonathan@marek.ca> <20241015004945.3676-5-jonathan@marek.ca> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241015004945.3676-5-jonathan@marek.ca> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: elJj5kqo37HeG99PaOzvulbI6hqEbLAC X-Proofpoint-ORIG-GUID: elJj5kqo37HeG99PaOzvulbI6hqEbLAC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 clxscore=1015 phishscore=0 mlxscore=0 impostorscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=884 lowpriorityscore=0 adultscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410310152 On 15.10.2024 2:47 AM, Jonathan Marek wrote: > See commit e67b45582c5e for explanation. > > Note: the 0xbc offset is arbitrary, it just needs to not be already in use. > > Signed-off-by: Jonathan Marek > --- > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > index 6dfc85eda3540..eb6b735c41453 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > @@ -1224,6 +1224,17 @@ edp_bl_en: edp-bl-en-state { > }; > }; > > +&pmk8550_rtc { > + nvmem-cells = <&rtc_offset>; > + nvmem-cell-names = "offset"; > +}; > + > +&pmk8550_sdam_2 { > + rtc_offset: rtc-offset@bc { > + reg = <0xbc 0x4>; > + }; > +}; Setting random bits in SDAM is a very very very very bad idea I'll try to get a good spot for the offset internally Konrad