From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 806B619D097 for ; Thu, 5 Sep 2024 14:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725545955; cv=none; b=PkTnztTsJPekHdtTy5LTzKY0/HHLHKMm+utGfRqDgJ9f/EjQK+6LlLEtlTZ1TfsBJ9WymTEoaEdlxVHKmNzwUtOXu4XYLfsZuq3Lj6H0ZqiIt9jofCoAechGXpX3uePu7cJAU9lpYIiJpqZ3sU3Pc0zqzJFI/g40eGxeSa//s6o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725545955; c=relaxed/simple; bh=Ud4dErg7kUeYKM8I36u+Hb2zRUhNAByigclHGaJbarY=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=A2RwQaN+Wmlw+ZwImR47iZzON2lfkVCtMAQhT3u5DAtJ8CwIBt5mtGr1q/uyDlUUXYxCFx53ZTkgVy2FmhCPMY+GobJIBXuJrFeyCuGplrcIejB4tT+rmOwQ37ETecVtMek4Mh2JWt+SeqdNDnaHQ3TAsFdUE7nMLYoXSP5uIgs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=P3SxArMm; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="P3SxArMm" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-53654d716d1so62379e87.2 for ; Thu, 05 Sep 2024 07:19:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1725545952; x=1726150752; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=qxVu4PuIdpnH7Y7EIddXVWOHJTc9XnXktin7tU2lfUQ=; b=P3SxArMme93WQe45oq9WkqXOTjPrEVZUjRW9KqinfqRUUxpPSG6PyJDtB4k4rZXj3C rzEOFCqCWZxCkE1vDqoups+YnUBACL10HNC1aE+nsxjawm/6HWkN6Jc7KcgejyltnF9N sVvnxiCbAf2+Ml5aaDtTkM5x7tR5OpEXwRBEtVmEdFSDbZgOykMU4e2+kcUyqd7iDUn5 nFs132uVuDE2nvuz0M+PlD/KD6hgIpXoOO26JZL59Az0pQBXqLmELpgImH6kUov4JYgu t97qUCCHxtkmKLiAdJLkSSJSK79qu072ryH49daAWMiITrxqCmAQFrU4ukouFkfFSEI5 eAPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725545952; x=1726150752; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=qxVu4PuIdpnH7Y7EIddXVWOHJTc9XnXktin7tU2lfUQ=; b=UsXidPGwGAciQ6cME2WjFQMnjFV+nV0OvOjrKATZ37kNFrK9ubJPofmCBGQiZg+nO6 MbMbYBwa8eJA86P2jFZFNMZS74fPWBhLGQiBlg5fyjo1yIQIUJ8mgUH4cGe8KpmlK9oE 8C29SykHF2eACxqIJ1Np1qxVry0vX500tnwb3TalVjocGE1kFB2mCDRdnlq4qCHsR6Kz 8yWLGl2wm1J/lhaKai8a8lTDcUxZSKsuu8wPwNzD5dCTLtCskdhn+eR32o6d1I3zH4Nw l17g+e3FOdDHlFejpfCV/nP8GS8qgCpO9FUZ6qedxGhA1uTp43EV3uzcG4K/nDpyAkv6 JOpA== X-Forwarded-Encrypted: i=1; AJvYcCVYIRyccZvbGVNh1Cu7T7su26RwDof5IiXz9x/Xksq6iOyHnhIiMW/xK6JmtgJGx/jhL+XeIsccssGL@vger.kernel.org X-Gm-Message-State: AOJu0Yz/GmxamDp5EPcedw7dcJZseA2ZZOk+ANCkVpVrksBRjKoT9Gl5 cGyH+RwiZHvmcn4L9bUuKrM5aDe5ut29HIv0uAhHXuX+fZYsmPCfohvQA0aDtew= X-Google-Smtp-Source: AGHT+IEPzvSfGbGRlHZcDR7zpj9bpmHt/0UXxWTZxE7FgbeOOJdYj80lQwxR//F8qBJ5xma5kh03fw== X-Received: by 2002:a05:6512:33c5:b0:52e:9daa:25f4 with SMTP id 2adb3069b0e04-53546aeaadbmr8347316e87.2.1725545951494; Thu, 05 Sep 2024 07:19:11 -0700 (PDT) Received: from [192.168.1.4] (88-112-131-206.elisa-laajakaista.fi. [88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5356a28c01csm356135e87.271.2024.09.05.07.19.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Sep 2024 07:19:11 -0700 (PDT) Message-ID: Date: Thu, 5 Sep 2024 17:18:50 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/7] i2c: qcom-cci: Stop complaining about DT set clock rate Content-Language: en-US To: Konrad Dybcio , Richard Acayan , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Robert Foss , Andi Shyti , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linux-media@vger.kernel.org References: <20240904020448.52035-9-mailingradian@gmail.com> <20240904020448.52035-12-mailingradian@gmail.com> <917917cc-3e78-4ab6-8fa4-82d9a6fe3fdd@kernel.org> From: Vladimir Zapolskiy In-Reply-To: <917917cc-3e78-4ab6-8fa4-82d9a6fe3fdd@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Konrad, On 9/5/24 16:57, Konrad Dybcio wrote: > On 4.09.2024 4:04 AM, Richard Acayan wrote: >> From: Bryan O'Donoghue >> >> It is common practice in the downstream and upstream CCI dt to set CCI >> clock rates to 19.2 MHz. It appears to be fairly common for initial code to >> set the CCI clock rate to 37.5 MHz. >> >> Applying the widely used CCI clock rates from downstream ought not to cause >> warning messages in the upstream kernel where our general policy is to >> usually copy downstream hardware clock rates across the range of Qualcomm >> drivers. >> >> Drop the warning it is pervasive across CAMSS users but doesn't add any >> information or warrant any changes to the DT to align the DT clock rate to >> the bootloader clock rate. >> >> Signed-off-by: Bryan O'Donoghue >> Reviewed-by: Vladimir Zapolskiy >> Link: https://lore.kernel.org/linux-arm-msm/20240824115900.40702-1-bryan.odonoghue@linaro.org >> Signed-off-by: Richard Acayan >> --- > > I.. am not sure this is really a problem? On some platforms the core > clock is only 19.2 Mhz, but e.g. on sdm845 we have: > > static const struct freq_tbl ftbl_cam_cc_cci_clk_src[] = { > F(19200000, P_BI_TCXO, 1, 0, 0), > F(37500000, P_CAM_CC_PLL0_OUT_EVEN, 16, 0, 0), > F(50000000, P_CAM_CC_PLL0_OUT_EVEN, 12, 0, 0), > F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0), > { } > }; > > Shouldn't this be somehow dynamically calculated? > I believe the problem fixed by the change is an unnecessary dev_warn(), in addition it's unclear why the CCI clock rate shall be strictly 37500000 for all "CCI v2" platforms. If the latter is a necessity, then it would be better to set the rate explicitly, however since it's not done for any such platforms, I would say that it is not needed. And if it is not needed, or a default and universal 19.2MHz rate is good enough, then I would suggest to remove everything 'cci_clk_rate' related from the driver, and this makes the change incomplete... -- Best wishes, Vladimir