[PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts

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* [PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
@ 2023-09-15  7:25 Wang Chen
  2023-09-15  7:33 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 3+ messages in thread
From: Wang Chen @ 2023-09-15  7:25 UTC (permalink / raw)
  To: linux-riscv, conor, aou, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, robh+dt
  Cc: devicetree, linux-kernel, jszhang, guoren, chao.wei,
	xiaoguang.xing, Emil Renner Berthing

From: Emil Renner Berthing <emil.renner.berthing@canonical.com>

Add compatible for the uarts on the Sophgo SG2042 RISC-V SoC.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
---
 Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 17c553123f96..6c23562f1b1e 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -48,6 +48,9 @@ properties:
               - starfive,jh7100-hsuart
               - starfive,jh7100-uart
           - const: snps,dw-apb-uart
+      - items:
+          - const: sophgo,sg2042-uart
+          - const: snps,dw-apb-uart
       - const: snps,dw-apb-uart
 
   reg:
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
  2023-09-15  7:25 [PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Wang Chen
@ 2023-09-15  7:33 ` Krzysztof Kozlowski
       [not found]   ` <MA0P287MB033226287163E5E20485433DFEFBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>
  0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15  7:33 UTC (permalink / raw)
  To: Wang Chen, linux-riscv, conor, aou, krzysztof.kozlowski+dt,
	palmer, paul.walmsley, robh+dt
  Cc: devicetree, linux-kernel, jszhang, guoren, chao.wei,
	xiaoguang.xing, Emil Renner Berthing

On 15/09/2023 09:25, Wang Chen wrote:
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> 
> Add compatible for the uarts on the Sophgo SG2042 RISC-V SoC.
> 
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

Missing Sob.

> ---
>  Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> index 17c553123f96..6c23562f1b1e 100644
> --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> @@ -48,6 +48,9 @@ properties:
>                - starfive,jh7100-hsuart
>                - starfive,jh7100-uart
>            - const: snps,dw-apb-uart
> +      - items:
> +          - const: sophgo,sg2042-uart

No, you do not get your own entry. Stuff it into previous enum.



Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 3+ messages in thread

[parent not found: <MA0P287MB033226287163E5E20485433DFEFBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>]

* Re: [PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
       [not found]   ` <MA0P287MB033226287163E5E20485433DFEFBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>
@ 2023-09-18 20:15     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-18 20:15 UTC (permalink / raw)
  To: Chen Wang, Wang Chen, linux-riscv, conor, aou,
	krzysztof.kozlowski+dt, palmer, paul.walmsley, robh+dt
  Cc: devicetree, linux-kernel, jszhang, guoren, chao.wei,
	xiaoguang.xing, Emil Renner Berthing

On 18/09/2023 14:49, Chen Wang wrote:
> Hi, Krzysztof,
> 
> I see Emil has clarified in anther email, I copy it here for your quick 
> reference:
> 
>  >Sophgo and StarFive are not the same company. Sophgo are using RISC-V 
> cores from T-Head and StarFive are using cores from SiFive.
> 
> And SG2042 is chip from Sophgo, and JH7100 is chip from StarFive.
> 
> So I think it should be better to use a new entry for sg2042, what do 
> you think?

We talked about different things. Previous discussion was about
compatibility. Here, you should just not create your own enum, because
there is no single need. Just put it to previous enum.

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 3+ messages in thread

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2023-09-15  7:25 [PATCH 09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Wang Chen
2023-09-15  7:33 ` Krzysztof Kozlowski
     [not found]   ` <MA0P287MB033226287163E5E20485433DFEFBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>
2023-09-18 20:15     ` Krzysztof Kozlowski

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