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Sun, 22 Oct 2023 23:36:51 -0700 (PDT) Received: from [192.168.1.20] ([178.197.218.126]) by smtp.gmail.com with ESMTPSA id f25-20020a170906561900b009920e9a3a73sm6154197ejq.115.2023.10.22.23.36.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 22 Oct 2023 23:36:51 -0700 (PDT) Message-ID: Date: Mon, 23 Oct 2023 08:36:48 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 06/11] iio: adc: Add QCOM PMIC5 Gen3 ADC bindings Content-Language: en-US To: Jishnu Prakash , agross@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, Jonathan.Cameron@huawei.com, sboyd@kernel.org, dmitry.baryshkov@linaro.org, quic_subbaram@quicinc.com, quic_collinsd@quicinc.com, quic_kamalw@quicinc.com, marijn.suijten@somainline.org, andriy.shevchenko@linux.intel.com, Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Luca Weiss , linux-iio@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: linux-arm-msm-owner@vger.kernel.org References: <20230708072835.3035398-1-quic_jprakash@quicinc.com> <20230708072835.3035398-7-quic_jprakash@quicinc.com> <99070bce-6188-82eb-c92c-cf7a323394e2@quicinc.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 23/10/2023 08:14, Jishnu Prakash wrote: > Hi Krzysztof, > > On 7/9/2023 10:53 PM, Krzysztof Kozlowski wrote: >> On 08/07/2023 09:28, Jishnu Prakash wrote: >>> For the PMIC5-Gen3 type PMICs, ADC peripheral is present in HW for the >>> following PMICs: PMK8550, PM8550, PM8550B and PM8550VX PMICs. >>> It is similar to PMIC5-Gen2, with SW communication to ADCs on all PMICs >>> going through PBS firmware through a single register interface. This >>> interface is implemented on an SDAM peripheral on the master PMIC PMK8550 >>> rather than a dedicated ADC peripheral. >>> >>> Signed-off-by: Jishnu Prakash >>> --- >>> properties: >>> compatible: >>> @@ -27,10 +27,11 @@ properties: >>> - qcom,spmi-adc5 >>> - qcom,spmi-adc-rev2 >>> - qcom,spmi-adc5-gen2 >>> + - qcom,spmi-adc5-gen3 >> >> This could be ordered... > > > Yes, will do that in the next patchset. > > >>> >>> reg: >>> description: VADC base address in the SPMI PMIC register map >>> - maxItems: 1 >>> + minItems: 1 >> Why? This does not make any sense. With previous patches it looks like >> random set of changes. > > > The idea here is to convey that reg can have multiple values for ADC5 > Gen3 as there can be more than one peripheral used for ADC, so there can > be multiple base addresses. I'll try to make this more clear in the next > patchset. You cannot remove constraints from an entry. > > >> >> >>> >>> '#address-cells': >>> const: 1 >>> @@ -38,6 +39,12 @@ properties: >>> '#size-cells': >>> const: 0 >>> >>> >>> + qcom,adc-tm-type: >>> + description: | >>> + Indicates if ADC_TM monitoring is done on this channel. >> Description does not match property name. > > > You mean it sounds more like an enum which can take several values > rather than just a boolean? I can update it to "qcom,adc-tm" if that > looks better. The property name suggests this is type of monitoring. Property description says this will enable ADC_TM monitoring. These two do not match. Except that I wonder now whether this is a property of hardware at all... What is this monitoring? By the driver? ... >>> then: >>> patternProperties: >>> @@ -299,7 +315,7 @@ examples: >>> label = "xo_therm"; >>> }; >>> >>> - channel@47 { >>> + channel@147 { >> Why? > > > It would be needed if this channel number was supposed to be the virtual > channel number made by combining PMIC SID and actual channel > number....but I could drop it for now and do it in a separate fix as > Jonathan suggested. > > >> >>> reg = ; >>> qcom,ratiometric; >>> qcom,hw-settle-time = <200>; >>> @@ -307,3 +323,80 @@ examples: >>> }; >>> }; >>> }; >>> + >>> + - | >>> + #include >>> + #include >>> + #include >>> + #include >>> + >>> + pmic { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + /* VADC node */ >>> + pmk8550_vadc: vadc@9000 { >>> + compatible = "qcom,spmi-adc5-gen3"; >> Don't add new examples which differ only in compatible. > > > This example does have differences unique to ADC5 Gen3 such as use of > "#thermal-sensor-cells" and "qcom,adc-tm-type" properties....to make it > clearer, I'll delete some of the excess nodes which don't highlight > these differences. > > >> >> >>> diff --git a/include/dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550.h b/include/dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550.h >>> new file mode 100644 >>> index 000000000000..74e6e2f6f9ed >>> --- /dev/null >>> +++ b/include/dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550.h >>> @@ -0,0 +1,48 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >> Dual license. > > > I think we do have an internal rule by which we do have to add these two > licenses....I'll check again and update them if required. Just to be clear: your internal rules are your internal affair. We expect here dual license. Best regards, Krzysztof