Re: [PATCH v2 1/2] dt-bindings: watchdog: Add NXP Software Watchdog Timer

[Daniel Lezcano <daniel.lezcano@linaro.org>]

On 03/04/2025 08:19, Ghennadi Procopciuc wrote:
> On 4/2/2025 6:49 PM, Daniel Lezcano wrote:
> [ ... ]
>> +examples:
>> +  - |
>> +    watchdog@0x40100000 {
>> +        compatible = "nxp,s32g2-swt";
>> +        reg = <0x40100000 0x1000>;
>> +        clocks = <&clks 0x3a>;
>> +        timeout-sec = <10>;
>> +    };
> 
> The S32G reference manual specifies two clocks for the SWT module: one
> for the registers and another for the counter itself. Shouldn't both
> clocks be represented in the bindings?

AFAICS, there are two clocks as described in the documentation for the 
s32g2 page 846, section 23.7.3.3 SWT clocking.

The module and the register clock are fed by the XBAR_DIV3_CLK which is 
an system clock always-on.

The counter is fed by the FIRC_CLK which described as "FIRC_CLK is the 
default clock for the entire system at power-up."

 From my understanding, we should not describe the XBAR_DIV3_CLK as it 
is a system clock.

And the FIRC_CLK is only there to get the clock rate in the driver.



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