From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Nickolay Goppen <setotau@mainlining.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht, linux@mainlining.org
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sdm630/660: Add CDSP-related nodes
Date: Mon, 20 Oct 2025 14:27:11 +0200 [thread overview]
Message-ID: <c605434b-b0f4-4a9a-8b28-cf1c77d5f20f@oss.qualcomm.com> (raw)
In-Reply-To: <20251019-qcom-sdm660-cdsp-adsp-dts-v1-1-9ab5f2865a6e@mainlining.org>
On 10/19/25 6:27 PM, Nickolay Goppen wrote:
> In order to enable CDSP support for SDM660 SoC:
> * add shared memory p2p nodes for CDSP
> * add CDSP-specific smmu node
> * add CDSP peripheral image loader node
>
> Memory region for CDSP in SDM660 occupies the same spot as
> TZ buffer mem defined in sdm630.dtsi (which does not have CDSP).
> In sdm660.dtsi replace buffer_mem inherited from SDM630 with
> cdsp_region, which is also larger in size.
>
> SDM636 also doesn't have CDSP, so remove inherited from sdm660.dtsi
> related nodes and add buffer_mem back.
>
> Signed-off-by: Nickolay Goppen <setotau@mainlining.org>
> ---
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/sdm636.dtsi | 14 ++++
> arch/arm64/boot/dts/qcom/sdm660.dtsi | 152 +++++++++++++++++++++++++++++++++++
> 3 files changed, 167 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 8b1a45a4e56e..a6a1933229b9 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -563,7 +563,7 @@ modem_smp2p_in: slave-kernel {
> };
> };
>
> - soc@0 {
> + soc: soc@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 0 0 0xffffffff>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm636.dtsi b/arch/arm64/boot/dts/qcom/sdm636.dtsi
> index ae15d81fa3f9..41e4e97f7747 100644
> --- a/arch/arm64/boot/dts/qcom/sdm636.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm636.dtsi
> @@ -16,6 +16,20 @@
> * be addressed when the aforementioned
> * peripherals will be enabled upstream.
> */
You can now remove the above comment ("Turing IP" is CDSP)
> + reserved-memory {
> + cdsp_region: cdsp@94a00000 {
> + reg = <0x00 0x94a00000 0x00 0x600000>;
One zero for 0x0 is good
[...]
> +&soc {
> + cdsp_smmu: iommu@5180000 {
> + compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2";
> + reg = <0x5180000 0x40000>;
> + #iommu-cells = <1>;
> +
> + clocks = <&gcc GCC_HLOS1_VOTE_TURING_ADSP_SMMU_CLK>;
> + clock-names = "bus";
> +
> + power-domains = <&gcc HLOS1_VOTE_TURING_ADSP_GDSC>;
> +
> + #global-interrupts = <2>;
> + interrupts =
> + <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
Please don't break the line in this weird way, put the < right after
a '=' followed with a space, and align the '<' below one another
> + <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
It would be neat to match the order of properites for this type of
node to e.g. the rather fresh x1e80100.dtsi, so:
interrupts
clocks
clock-names
power-domains
> + };
> +
> + cdsp_pil: remoteproc@1a300000 {
"remoteproc_cdsp:"> + compatible = "qcom,sdm660-cdsp-pas";
> + reg = <0x1a300000 0x00100>;
> + interrupts-extended =
> + <&intc GIC_SPI 518 IRQ_TYPE_EDGE_RISING>,
(same comment about line breaks)
> + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
1 a line, please> +
> + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
> + clock-names = "xo";
> +
> + memory-region = <&cdsp_region>;
> + power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domain-names = "cx";
> +
> + qcom,smem-states = <&cdsp_smp2p_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + glink-edge {
> + interrupts = <GIC_SPI 513 IRQ_TYPE_EDGE_RISING>;
> +
> + label = "turing";
> + mboxes = <&apcs_glb 29>;
> + qcom,remote-pid = <5>;
> +
> + fastrpc {
> + compatible = "qcom,fastrpc";
> + qcom,glink-channels = "fastrpcglink-apps-dsp";
> + label = "cdsp";
> + qcom,non-secure-domain;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + compute-cb@5 {
> + compatible = "qcom,fastrpc-compute-cb";
> + reg = <5>;
> + iommus = <&cdsp_smmu 3>;
> + };
> + compute-cb@6 {
Please add a \n between each subsequent subnode
LGTM for the actual meat and potatoes, nice!
Konrad
next prev parent reply other threads:[~2025-10-20 12:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-19 16:27 [PATCH 0/2] arm64: dts: qcom: Add support for SDM660 CDSP and ADSP FastRPC Nickolay Goppen
2025-10-19 16:27 ` [PATCH 1/2] arm64: dts: qcom: sdm630/660: Add CDSP-related nodes Nickolay Goppen
2025-10-20 12:27 ` Konrad Dybcio [this message]
2025-10-20 12:38 ` Nickolay Goppen
2025-10-20 12:39 ` Konrad Dybcio
2025-10-20 13:14 ` Dmitry Baryshkov
2025-10-20 15:27 ` Nickolay Goppen
2025-10-20 15:42 ` Nickolay Goppen
2025-10-22 17:17 ` Konrad Dybcio
2025-10-23 14:23 ` Dmitry Baryshkov
2025-10-19 16:27 ` [PATCH 2/2] arm64: dts: qcom: sdm630: Add FastRPC nodes to ADSP Nickolay Goppen
2025-10-20 12:29 ` Konrad Dybcio
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