From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Hawa, Hanna" Subject: Re: [PATCH 2/2] edac: add support for Amazon's Annapurna Labs EDAC Date: Mon, 3 Jun 2019 09:56:44 +0300 Message-ID: References: <1559211329-13098-1-git-send-email-hhhawa@amazon.com> <1559211329-13098-3-git-send-email-hhhawa@amazon.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: "Herrenschmidt, Benjamin" , "robh+dt@kernel.org" , "Woodhouse, David" , "paulmck@linux.ibm.com" , "james.morse@arm.com" , "mchehab@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "bp@alien8.de" , "davem@davemloft.net" , "nicolas.ferre@microchip.com" Cc: "devicetree@vger.kernel.org" , "Shenhar, Talel" , "linux-kernel@vger.kernel.org" , "Chocron, Jonathan" , "Krupnik, Ronen" , "linux-edac@vger.kernel.org" , "Hanoch, Uri" List-Id: devicetree@vger.kernel.org On 5/31/2019 4:15 AM, Herrenschmidt, Benjamin wrote: > On Thu, 2019-05-30 at 11:19 -0700, Boris Petkov wrote: >> On May 30, 2019 3:15:29 AM PDT, Hanna Hawa wrote: >>> Add support for error detection and correction for Amazon's >>> Annapurna >>> Labs SoCs for L1/L2 caches. >> >> >> So this should be a driver for the whole annapurna platform and not >> only about the RAS functionality in an IP like the caches. See other >> ARM EDAC drivers in drivers/edac/ for an example. > > This isn't terribly helpful, there's nothing telling anybody which of > those files corresponds to an ARM SoC :-) > > That said ... > > You really want a single EDAC driver that contains all the stuff for > the caches, the memory controller, etc... ? > > The idea here was to separate the core L1/L2 EDAC from the memory > controller EDAC I think ... Roben, Hanna, can you describe the long run > strategy here ? Correct our target to separate the L1/L2 EDAC from mc, and to maintain both in separate drivers. Thanks, Hanna > > Cheers, > Ben. >