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* [PATCH] arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree
@ 2018-12-13 20:59 dwesterg
  2018-12-13 21:56 ` Dinh Nguyen
  0 siblings, 1 reply; 3+ messages in thread
From: dwesterg @ 2018-12-13 20:59 UTC (permalink / raw)
  To: dinguyen, robh+dt, mark.rutland, devicetree, linux-kernel,
	thor.thayer
  Cc: Dalon Westergreen

From: Dalon Westergreen <dalon.westergreen@linux.intel.com>

Add the stmmac ptp_ref clock as it is configured in the arria10 socdk.
The stmmac driver defaults the ptp_ref clock to the main stmmac clock
if the ptp_ref clock is not set in the devicetree.  This is inapprotiate
for the arria10 socdk.

Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
---
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index 2a7466891d0e..58bfa84dcdb3 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -74,7 +74,8 @@
 &gmac0 {
 	phy-mode = "rgmii";
 	phy-addr = <0xffffffff>; /* probe for phy addr */
-
+	clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+	clock-names = "stmmaceth", "ptp_ref";
 	/*
 	 * These skews assume the user's FPGA design is adding 600ps of delay
 	 * for TX_CLK on Arria 10.
-- 
2.19.2

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree
  2018-12-13 20:59 [PATCH] arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree dwesterg
@ 2018-12-13 21:56 ` Dinh Nguyen
  2018-12-13 22:30   ` Dalon Westergreen
  0 siblings, 1 reply; 3+ messages in thread
From: Dinh Nguyen @ 2018-12-13 21:56 UTC (permalink / raw)
  To: dwesterg, robh+dt, mark.rutland, devicetree, linux-kernel,
	thor.thayer
  Cc: Dalon Westergreen



On 12/13/18 2:59 PM, dwesterg@gmail.com wrote:
> From: Dalon Westergreen <dalon.westergreen@linux.intel.com>
> 
> Add the stmmac ptp_ref clock as it is configured in the arria10 socdk.
> The stmmac driver defaults the ptp_ref clock to the main stmmac clock
> if the ptp_ref clock is not set in the devicetree.  This is inapprotiate

s/inapprotiate/inappropriate

> for the arria10 socdk.
> 
> Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
> ---
>  arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> index 2a7466891d0e..58bfa84dcdb3 100644
> --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> @@ -74,7 +74,8 @@
>  &gmac0 {
>  	phy-mode = "rgmii";
>  	phy-addr = <0xffffffff>; /* probe for phy addr */
> -
> +	clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
> +	clock-names = "stmmaceth", "ptp_ref";
>  	
These should go into the base arria10 dtsi at socfpga_arria10.dtsi?
Should the other gmacs get the same updates?

Also the patch header should be "ARM: dts: arria10:"

Dinh

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree
  2018-12-13 21:56 ` Dinh Nguyen
@ 2018-12-13 22:30   ` Dalon Westergreen
  0 siblings, 0 replies; 3+ messages in thread
From: Dalon Westergreen @ 2018-12-13 22:30 UTC (permalink / raw)
  To: Dinh Nguyen, robh+dt, mark.rutland, devicetree, linux-kernel,
	thor.thayer

On Thu, 2018-12-13 at 15:56 -0600, Dinh Nguyen wrote:
> 
> On 12/13/18 2:59 PM, dwesterg@gmail.com wrote:
> > From: Dalon Westergreen <dalon.westergreen@linux.intel.com>
> > 
> > Add the stmmac ptp_ref clock as it is configured in the arria10 socdk.
> > The stmmac driver defaults the ptp_ref clock to the main stmmac clock
> > if the ptp_ref clock is not set in the devicetree.  This is inapprotiate
> 
> s/inapprotiate/inappropriate
> 
> > for the arria10 socdk.
> > 
> > Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
> > ---
> >  arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> > b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> > index 2a7466891d0e..58bfa84dcdb3 100644
> > --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> > +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
> > @@ -74,7 +74,8 @@
> >  &gmac0 {
> >  	phy-mode = "rgmii";
> >  	phy-addr = <0xffffffff>; /* probe for phy addr */
> > -
> > +	clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
> > +	clock-names = "stmmaceth", "ptp_ref";
> >  	
> These should go into the base arria10 dtsi at socfpga_arria10.dtsi?
> Should the other gmacs get the same updates?

Agreed, I will send a new patch set that addresses cv/av, a10, and s10.

> 
> Also the patch header should be "ARM: dts: arria10:"
> 
> Dinh

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-12-13 22:30 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2018-12-13 20:59 [PATCH] arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree dwesterg
2018-12-13 21:56 ` Dinh Nguyen
2018-12-13 22:30   ` Dalon Westergreen

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