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From: Marek Vasut <marek.vasut@mailbox.org>
To: Liu Ying <victor.liu@nxp.com>, Rob Herring <robh@kernel.org>
Cc: dri-devel@lists.freedesktop.org, Abel Vesa <abelvesa@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Fabio Estevam <festevam@gmail.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Lucas Stach <l.stach@pengutronix.de>, Peng Fan <peng.fan@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Shawn Guo <shawnguo@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	devicetree@vger.kernel.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 01/39] dt-bindings: display: imx: Document i.MX95 Display Controller DomainBlend
Date: Fri, 17 Oct 2025 17:15:35 +0200	[thread overview]
Message-ID: <c712dae1-00a5-4cc0-baef-2ce014bd470f@mailbox.org> (raw)
In-Reply-To: <5c5bb009-3463-4282-946f-3ae93fab11ec@nxp.com>

On 10/16/25 4:07 AM, Liu Ying wrote:

Hello Liu,

>>> +$id: http://devicetree.org/schemas/display/imx/fsl,imx95-dc-domainblend.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Freescale i.MX95 Display Controller Domain Blend Unit
>>> +
>>> +description: Combines two input frames to a single output frame.
> 
> I'd like to comment on patches in split patch serieses(to be sent if needed).
> But, since I provide the below interrupt information, anyway I take the chance
> to comment more:
> 
> Add more description about the unit according to i.MX95 DC IP spec:
> The unit operates in four modes:
> - Primary mode: The primary input is used for output.
> - Secondary mode: The secondary input is used for output.
> - Blend mode: Primary and secondary inputs are blended, according to the
>                programmed blending functions.
> - SidebySide mode: Primary and secondary streams are projected side by side,
>                     i.e., primary video on the left side and secondary on the
> 		   right.
> 
> BTW, I confirm that two Domain Blend Units exist in i.MX95 DC while they don't
> exist in i.MX8qxp/qm DCs.  And, as you can see, this unit supports multiple
> modes, this would impact how an OS implements a display driver a lot, especially
> Blend mode and SidebySide mode.

There is one thing which specifically concerns me about the DB, it seems 
to be capable of blending two inputs from different security domains, is 
that correct ?

>>> +maintainers:
>>> +  - Marek Vasut <marek.vasut@mailbox.org>
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: fsl,imx95-dc-domainblend
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>
>> No clocks or other resources?
> 
> As patch 39 shows, there are 3 interrupts - domainblend{0,1}_shdload,
> domainblend{0,1}_framecomplete and domainblend{0,1}_seqcomplete.
It seems we currently do not use either clock or interrupts on either 
domainblend or layerblend IPs, but maybe DB and LB are different and LB 
really has no clock/interrupts ?

  reply	other threads:[~2025-10-17 16:51 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-11 16:51 [PATCH 00/39] Add i.MX95 DPU/DSI/LVDS support Marek Vasut
2025-10-11 16:51 ` [PATCH 01/39] dt-bindings: display: imx: Document i.MX95 Display Controller DomainBlend Marek Vasut
2025-10-15 13:24   ` Rob Herring
2025-10-16  2:07     ` Liu Ying
2025-10-17 15:15       ` Marek Vasut [this message]
2025-10-18  6:09         ` Ying Liu
2025-11-02 16:41           ` Marek Vasut
2025-11-04  3:31             ` Liu Ying
2025-10-21  6:52       ` Krzysztof Kozlowski
2025-10-11 16:51 ` [PATCH 02/39] drm/imx: Add " Marek Vasut
2025-10-13 16:38   ` Frank Li
2025-10-14 11:50     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 03/39] dt-bindings: display: imx: Document i.MX95 Display Controller processing units Marek Vasut
2025-10-13 16:49   ` Frank Li
2025-10-14 11:52     ` Marek Vasut
2025-10-15  8:59       ` Liu Ying
2025-10-15 10:19         ` Marek Vasut
2025-10-16  2:28           ` Liu Ying
2025-10-16  2:58             ` Liu Ying
2025-10-17 15:18             ` Marek Vasut
2025-10-18  5:44               ` Ying Liu
2025-10-11 16:51 ` [PATCH 04/39] drm/imx: dc: Use bulk clock Marek Vasut
2025-10-13 16:54   ` Frank Li
2025-10-14 12:02     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 05/39] drm/imx: dc: Rework dc_subdev_get_id() to drop ARRAY_SIZE() use Marek Vasut
2025-10-13 16:56   ` Frank Li
2025-10-14 14:03     ` Marek Vasut
2025-10-14 15:11       ` Frank Li
2025-10-14 21:11         ` Marek Vasut
2025-10-15  9:14           ` Liu Ying
2025-10-15 14:31             ` Frank Li
2025-10-16  2:50               ` Liu Ying
2025-10-11 16:51 ` [PATCH 06/39] drm/imx: dc: Rename i.MX8QXP specific Link IDs Marek Vasut
2025-10-13 16:58   ` Frank Li
2025-10-11 16:51 ` [PATCH 07/39] drm/imx: dc: cf: Pass struct dc_subdev_info via OF match data Marek Vasut
2025-10-13 17:01   ` Frank Li
2025-10-11 16:51 ` [PATCH 08/39] drm/imx: dc: de: Pass struct dc_de_subdev_match_data " Marek Vasut
2025-10-13 17:05   ` Frank Li
2025-10-11 16:51 ` [PATCH 09/39] drm/imx: dc: ed: Rework dc_ed_pec_src_sel() to drop ARRAY_SIZE() use Marek Vasut
2025-10-13 18:24   ` Frank Li
2025-10-11 16:51 ` [PATCH 10/39] drm/imx: dc: ed: Pass struct dc_ed_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:26   ` Frank Li
2025-10-11 16:51 ` [PATCH 11/39] drm/imx: dc: fg: Parametrize register access Marek Vasut
2025-10-13 18:29   ` Frank Li
2025-10-11 16:51 ` [PATCH 12/39] drm/imx: dc: ed: Pass struct dc_fg_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:31   ` Frank Li
2025-10-11 16:51 ` [PATCH 13/39] drm/imx: dc: fu: Describe remaining register offsets Marek Vasut
2025-10-13 18:34   ` Frank Li
2025-10-11 16:51 ` [PATCH 14/39] drm/imx: dc: fu: Inline FRAC_OFFSET into FetchLayer and FetchWrap Marek Vasut
2025-10-13 18:39   ` Frank Li
2025-10-11 16:51 ` [PATCH 15/39] drm/imx: dc: fu: Pass struct dc_fu_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:43   ` Frank Li
2025-10-11 16:51 ` [PATCH 16/39] drm/imx: dc: lb: Pass struct dc_lb_subdev_match_data " Marek Vasut
2025-10-13 18:45   ` Frank Li
2025-10-11 16:51 ` [PATCH 17/39] drm/imx: dc: tc: Pass struct dc_tc_subdev_match_data " Marek Vasut
2025-10-11 16:51 ` [PATCH 18/39] drm/imx: dc: ic: Pass struct dc_ic_subdev_match_data " Marek Vasut
2025-10-11 16:51 ` [PATCH 19/39] drm/imx: dc: ic: Use DT node as interrupt controller name Marek Vasut
2025-10-11 16:51 ` [PATCH 20/39] drm/imx: dc: Configure display CSR clock feed select Marek Vasut
2025-10-13 18:48   ` Frank Li
2025-10-17 15:20     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 21/39] drm/imx: dc: crtc: Do not check disabled CRTCs Marek Vasut
2025-10-13 18:50   ` Frank Li
2025-10-14 21:41     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 22/39] drm/imx: dc: Keep FU unit running on i.MX95 Marek Vasut
2025-10-13 18:52   ` Frank Li
2025-10-11 16:51 ` [PATCH 23/39] drm/imx: dc: Add OF match data for i.MX95 Marek Vasut
2025-10-13 18:54   ` Frank Li
2025-10-11 16:51 ` [PATCH 24/39] drm/imx: Add more RGB swizzling options Marek Vasut
2025-10-11 16:51 ` [PATCH 25/39] dt-bindings: display: bridge: Document NXP i.MX95 pixel interleaver support Marek Vasut
2025-10-13 18:57   ` Frank Li
2025-10-17 14:55     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 26/39] drm/bridge: imx: Add " Marek Vasut
2025-10-13 19:02   ` Frank Li
2025-10-11 16:51 ` [PATCH 27/39] dt-bindings: display: bridge: Document NXP i.MX95 pixel link support Marek Vasut
2025-10-13 19:08   ` Frank Li
2025-10-17 15:01     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 28/39] drm/bridge: imx: Add " Marek Vasut
2025-10-13 19:10   ` Frank Li
2025-10-11 16:51 ` [PATCH 29/39] dt-bindings: display: bridge: Document Freescale i.MX95 MIPI DSI Marek Vasut
2025-10-13 19:13   ` Frank Li
2025-10-17 15:37     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 30/39] drm/bridge: imx93-mipi-dsi: Add i.MX95 PLL initialization Marek Vasut
2025-10-11 16:51 ` [PATCH 31/39] dt-bindings: clock: Split support for i.MX95 LVDS CSR Marek Vasut
2025-10-13 19:17   ` Frank Li
2025-10-17 15:49     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 32/39] dt-bindings: display: bridge: Document i.MX95 LVDS display bridge binding Marek Vasut
2025-10-13 19:20   ` Frank Li
2025-10-17 15:04     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 33/39] drm: bridge: imx: Add i.MX95 LVDS Display Bridge (LDB) driver Marek Vasut
2025-10-11 16:51 ` [PATCH 34/39] dt-bindings: display: bridge: ldb: Add an i.MX95 entry Marek Vasut
2025-10-13 11:34   ` Rob Herring (Arm)
2025-10-11 16:51 ` [PATCH 35/39] drm/bridge: fsl-ldb: Parse register offsets from DT Marek Vasut
2025-10-13 19:23   ` Frank Li
2025-10-17 15:39     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 36/39] drm/bridge: fsl-ldb: Add i.MX95 support Marek Vasut
2025-10-13 19:24   ` Frank Li
2025-10-11 16:51 ` [PATCH 37/39] dt-bindings: interrupt-controller: fsl,irqsteer: " Marek Vasut
2025-10-13 19:25   ` Frank Li
2025-10-15 13:31   ` Rob Herring (Arm)
2025-10-11 16:51 ` [PATCH 38/39] dt-bindings: clock: support i.MX95 Display Stream CSR module Marek Vasut
2025-10-13 19:26   ` Frank Li
2025-10-17 15:05     ` Marek Vasut
2025-10-15 13:33   ` Rob Herring
2025-10-17 15:08     ` Marek Vasut
2025-10-11 16:51 ` [PATCH 39/39] arm64: dts: imx95: Describe display pipeline Marek Vasut
2025-10-14  8:51 ` [PATCH 00/39] Add i.MX95 DPU/DSI/LVDS support Liu Ying
2025-10-14 21:55   ` Marek Vasut
2025-10-15 10:00     ` Liu Ying
2025-10-15 16:18       ` Marek Vasut
2025-10-20  2:15         ` Ying Liu
2025-11-02 16:33           ` Marek Vasut
2025-11-04  7:00             ` Liu Ying
2025-10-14  9:13 ` Liu Ying
2025-10-14 22:09   ` Marek Vasut
2025-10-15 10:09     ` Liu Ying
2025-10-17 15:54       ` Marek Vasut
2025-10-20  2:35         ` Liu Ying

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