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([2001:818:ea56:d000:94c4:fb0e:28f:2a8d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-436297462a8sm16785577f8f.30.2026.02.08.01.35.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Feb 2026 01:35:47 -0800 (PST) Message-ID: Subject: Re: [PATCH 6/6] iio: adc: ad4080: add support for AD4088 From: Nuno =?ISO-8859-1?Q?S=E1?= To: Antoniu Miclaus , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Sun, 08 Feb 2026 09:36:52 +0000 In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote: > Add support for AD4088 14-bit SAR ADC. The AD4088 has the same > resolution as AD4087 (14-bit) but differs in LVDS CNV clock count > maximum (8 vs 1). >=20 > Changes: > - Add AD4088_CHIP_ID definition (0x0058) > - Create ad4088_channel with 14-bit resolution and 16-bit storage > - Add ad4088_chip_info with lvds_cnv_clk_cnt_max =3D 8 > - Register AD4088 in device ID and OF match tables >=20 > Signed-off-by: Antoniu Miclaus > --- Same, Reviewed-by: Nuno S=C3=A1 > =C2=A0drivers/iio/adc/ad4080.c | 15 +++++++++++++++ > =C2=A01 file changed, 15 insertions(+) >=20 > diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c > index 728df626f09e..fc261d3d7687 100644 > --- a/drivers/iio/adc/ad4080.c > +++ b/drivers/iio/adc/ad4080.c > @@ -133,6 +133,7 @@ > =C2=A0#define AD4085_CHIP_ID 0x0055 > =C2=A0#define AD4086_CHIP_ID 0x0056 > =C2=A0#define AD4087_CHIP_ID 0x0057 > +#define AD4088_CHIP_ID 0x0058 > =C2=A0 > =C2=A0#define AD4080_LVDS_CNV_CLK_CNT_MAX 7 > =C2=A0 > @@ -456,6 +457,8 @@ static const struct iio_chan_spec ad4086_channel =3D > AD4080_CHANNEL_DEFINE(14, 16) > =C2=A0 > =C2=A0static const struct iio_chan_spec ad4087_channel =3D AD4080_CHANNEL= _DEFINE(14, 16); > =C2=A0 > +static const struct iio_chan_spec ad4088_channel =3D AD4080_CHANNEL_DEFI= NE(14, 16); > + > =C2=A0static const struct ad4080_chip_info ad4080_chip_info =3D { > =C2=A0 .name =3D "ad4080", > =C2=A0 .product_id =3D AD4080_CHIP_ID, > @@ -536,6 +539,16 @@ static const struct ad4080_chip_info ad4087_chip_inf= o =3D { > =C2=A0 .lvds_cnv_clk_cnt_max =3D 1, > =C2=A0}; > =C2=A0 > +static const struct ad4080_chip_info ad4088_chip_info =3D { > + .name =3D "ad4088", > + .product_id =3D AD4088_CHIP_ID, > + .scale_table =3D ad4080_scale_table, > + .num_scales =3D ARRAY_SIZE(ad4080_scale_table), > + .num_channels =3D 1, > + .channels =3D &ad4088_channel, > + .lvds_cnv_clk_cnt_max =3D 8, > +}; > + > =C2=A0static int ad4080_setup(struct iio_dev *indio_dev) > =C2=A0{ > =C2=A0 struct ad4080_state *st =3D iio_priv(indio_dev); > @@ -698,6 +711,7 @@ static const struct spi_device_id ad4080_id[] =3D { > =C2=A0 { "ad4085", (kernel_ulong_t)&ad4085_chip_info }, > =C2=A0 { "ad4086", (kernel_ulong_t)&ad4086_chip_info }, > =C2=A0 { "ad4087", (kernel_ulong_t)&ad4087_chip_info }, > + { "ad4088", (kernel_ulong_t)&ad4088_chip_info }, > =C2=A0 { } > =C2=A0}; > =C2=A0MODULE_DEVICE_TABLE(spi, ad4080_id); > @@ -711,6 +725,7 @@ static const struct of_device_id ad4080_of_match[] = =3D { > =C2=A0 { .compatible =3D "adi,ad4085", &ad4085_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4086", &ad4086_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4087", &ad4087_chip_info }, > + { .compatible =3D "adi,ad4088", &ad4088_chip_info }, > =C2=A0 { } > =C2=A0}; > =C2=A0MODULE_DEVICE_TABLE(of, ad4080_of_match);