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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Jay Liu <jay.liu@mediatek.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	CK Hu <ck.hu@mediatek.com>, Hsin-Yi Wang <hsinyi@chromium.org>
Cc: dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH 3/7] drm/mediatek: Add TDSHP component support for MT8196
Date: Wed, 19 Feb 2025 13:37:51 +0100	[thread overview]
Message-ID: <c72a8643-4211-40e1-a64d-6bf3c69bcae1@collabora.com> (raw)
In-Reply-To: <20250219092040.11227-4-jay.liu@mediatek.com>

Il 19/02/25 10:20, Jay Liu ha scritto:
> Add TDSHP component support for MT8196.
> TDSHP is a hardware module designed to enhance the sharpness and
> clarity of displayed images by analyzing and improving edges and
> fine details in frames.
> 
> Signed-off-by: Jay Liu <jay.liu@mediatek.com>
> ---
>   drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 58 +++++++++++++++++++++++++
>   drivers/gpu/drm/mediatek/mtk_ddp_comp.h |  1 +
>   drivers/gpu/drm/mediatek/mtk_drm_drv.c  |  2 +
>   3 files changed, 61 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index d7e230bac53e..b87fde64ee49 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -57,6 +57,16 @@
>   #define POSTMASK_RELAY_MODE				BIT(0)
>   #define DISP_REG_POSTMASK_SIZE			0x0030
>   
> +#define DISP_REG_TDSHP_EN			0x0000
> +#define DISP_TDSHP_TDS_EN			BIT(31)
> +#define DISP_REG_TDSHP_CTRL			0x0100
> +#define DISP_TDSHP_CTRL_EN			BIT(0)
> +#define DISP_TDSHP_PWR_SCL_EN			BIT(2)
> +#define DISP_REG_TDSHP_CFG			0x0110

#define TDSHP_RELAY_MODE	BIT(0)

> +#define DISP_REG_TDSHP_INPUT_SIZE		0x0120
> +#define DISP_REG_TDSHP_OUTPUT_OFFSET		0x0124
> +#define DISP_REG_TDSHP_OUTPUT_SIZE		0x0128
> +
>   #define DISP_REG_UFO_START			0x0000
>   #define UFO_BYPASS				BIT(2)
>   
> @@ -261,6 +271,44 @@ static void mtk_postmask_stop(struct device *dev)
>   	writel_relaxed(0x0, priv->regs + DISP_REG_POSTMASK_EN);
>   }
>   
> +static void mtk_disp_tdshp_config(struct device *dev, unsigned int w,
> +				  unsigned int h, unsigned int vrefresh,
> +				  unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +	u32 tdshp_ctrl = (bpc == 8) ? DISP_TDSHP_PWR_SCL_EN | DISP_TDSHP_CTRL_EN : 0;
> +
> +	mtk_ddp_write(cmdq_pkt, tdshp_ctrl, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_TDSHP_CTRL);
> +
> +	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_TDSHP_INPUT_SIZE);
> +	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_TDSHP_OUTPUT_SIZE);
> +	mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_TDSHP_OUTPUT_OFFSET);
> +
> +	mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg,

mtk_ddp_write(cmdq_pkt, TDSHP_RELAY_MODE, ... etc etc

> +		      priv->regs, DISP_REG_TDSHP_CFG);
> +
> +	mtk_ddp_write_mask(cmdq_pkt, DISP_TDSHP_TDS_EN, &priv->cmdq_reg, priv->regs,
> +			   DISP_REG_TDSHP_EN, DISP_TDSHP_TDS_EN);
> +}
> +
> +static void mtk_disp_tdshp_start(struct device *dev)
> +{
> +	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> +	writel(DISP_TDSHP_CTRL_EN, priv->regs + DISP_REG_TDSHP_CTRL);
> +}
> +
> +static void mtk_disp_tdshp_stop(struct device *dev)
> +{
> +	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> +	writel(0x0, priv->regs + DISP_REG_TDSHP_CTRL);

writel(0, priv->regs + DISP_REG_TDSHP_CTRL);

> +}
> +

After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>



  reply	other threads:[~2025-02-19 12:37 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-19  9:20 [PATCH 0/7] porting pq compnent for MT8196 Jay Liu
2025-02-19  9:20 ` [PATCH 1/7] drm/mediatek: Add CCORR component support " Jay Liu
2025-02-19 12:49   ` AngeloGioacchino Del Regno
2025-02-24 12:49     ` Jay Liu (刘博)
2025-02-26 11:36     ` Jay Liu (刘博)
2025-02-26 12:14       ` AngeloGioacchino Del Regno
2025-02-26  7:09   ` CK Hu (胡俊光)
2025-02-19  9:20 ` [PATCH 2/7] drm/mediatek: fix CCORR mtk_ctm_s31_32_to_s1_n function issue Jay Liu
2025-02-19 12:49   ` AngeloGioacchino Del Regno
2025-02-26  6:41   ` CK Hu (胡俊光)
2025-02-19  9:20 ` [PATCH 3/7] drm/mediatek: Add TDSHP component support for MT8196 Jay Liu
2025-02-19 12:37   ` AngeloGioacchino Del Regno [this message]
2025-02-26  7:40   ` CK Hu (胡俊光)
2025-02-19  9:20 ` [PATCH 4/7] dt-bindings: display: mediatek: ccorr: Add " Jay Liu
2025-02-19  9:23   ` Krzysztof Kozlowski
2025-02-19 12:49   ` AngeloGioacchino Del Regno
2025-02-19  9:20 ` [PATCH 5/7] dt-bindings: display: mediatek: dither: " Jay Liu
2025-02-19  9:20 ` [PATCH 6/7] dt-bindings: display: mediatek: gamma: " Jay Liu
2025-02-19  9:20 ` [PATCH 7/7] dt-bindings: display: mediatek: tdshp: " Jay Liu
2025-02-19  9:25   ` Krzysztof Kozlowski
2025-02-19 12:49     ` AngeloGioacchino Del Regno
2025-02-26 11:37     ` Jay Liu (刘博)

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