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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id t9-20020a056512030900b004a05837103csm1923980lfp.196.2022.11.21.00.47.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Nov 2022 00:47:41 -0800 (PST) Message-ID: Date: Mon, 21 Nov 2022 09:47:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Content-Language: en-US To: Emil Renner Berthing , Hal Feng Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette , Philipp Zabel , linux-kernel@vger.kernel.org References: <20221118010627.70576-1-hal.feng@starfivetech.com> <20221118010627.70576-10-hal.feng@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 18/11/2022 17:50, Emil Renner Berthing wrote: > On Fri, 18 Nov 2022 at 02:06, Hal Feng wrote: >> >> From: Emil Renner Berthing >> >> Add bindings for the system clock and reset generator (SYSCRG) on the >> JH7110 RISC-V SoC by StarFive Ltd. >> >> Signed-off-by: Emil Renner Berthing >> Signed-off-by: Hal Feng >> --- >> .../clock/starfive,jh7110-syscrg.yaml | 80 +++++++++++++++++++ >> MAINTAINERS | 2 +- >> 2 files changed, 81 insertions(+), 1 deletion(-) >> create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml >> >> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml >> new file mode 100644 >> index 000000000000..a8cafbc0afe2 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml >> @@ -0,0 +1,80 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: StarFive JH7110 System Clock and Reset Generator >> + >> +maintainers: >> + - Emil Renner Berthing >> + >> +properties: >> + compatible: >> + const: starfive,jh7110-syscrg >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + items: >> + - description: Main Oscillator (24 MHz) >> + - description: RMII reference clock >> + - description: RGMII RX clock >> + - description: I2S TX bit clock >> + - description: I2S TX left/right clock >> + - description: I2S RX bit clock >> + - description: I2S RX left/right clock >> + - description: TDM >> + - description: mclk > > Maybe you could ask your colleagues for a better description of these clocks. And drop "clock" from previous descriptions. All these are clocks, so no need to repeat it. Best regards, Krzysztof