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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id w19-20020a17090aea1300b002960e397891sm2172696pjy.1.2024.02.18.02.34.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Feb 2024 02:35:01 -0800 (PST) Message-ID: Date: Sun, 18 Feb 2024 11:34:56 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 0/3] clocksource: imx-sysctr: support i.MX95 Content-Language: en-US To: "Peng Fan (OSS)" , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bai Ping , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Marco Felsch Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Peng Fan , Krzysztof Kozlowski References: <20240205-imx-sysctr-v4-0-ca5a6e1552e7@nxp.com> From: Daniel Lezcano In-Reply-To: <20240205-imx-sysctr-v4-0-ca5a6e1552e7@nxp.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 05/02/2024 04:17, Peng Fan (OSS) wrote: > i.MX95 System Counter module control register space is blocked > by SCMI firmware, so we use Read Register space to get the counter. > > V2: > - imx95 is not compatible with the existing hardware, so add a > seperate entry for i.MX95 in dt-binding. > - Per Marco's comments, the global variables was removed except > to_sysctr. And add a new TIMER_OF_DECLARE entry for i.MX95 > > Signed-off-by: Peng Fan > --- Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog