From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Krzysztof Kozlowski <krzk@kernel.org>,
geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
gregkh@linuxfoundation.org, jirislaby@kernel.org,
p.zabel@pengutronix.de, claudiu.beznea.uj@bp.renesas.com,
wsa+renesas@sang-engineering.com,
prabhakar.mahadev-lad.rj@bp.renesas.com
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v4 1/4] serial: sh-sci: Update the suspend/resume support
Date: Wed, 22 Jan 2025 12:09:17 +0200 [thread overview]
Message-ID: <c7e34ef0-b094-456a-ba68-2709ff7cec13@tuxon.dev> (raw)
In-Reply-To: <04fde244-006f-4bda-9d65-7957be74f049@kernel.org>
On 21.01.2025 10:54, Krzysztof Kozlowski wrote:
> On 20/01/2025 14:09, Claudiu wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> The Renesas RZ/G3S supports a power saving mode where power to most of the
>> SoC components is turned off. When returning from this power saving mode,
>> SoC components need to be re-configured.
>>
>> The SCIFs on the Renesas RZ/G3S need to be re-configured as well when
>> returning from this power saving mode. The sh-sci code already configures
>> the SCIF clocks, power domain and registers by calling uart_resume_port()
>> in sci_resume(). On suspend path the SCIF UART ports are suspended
>> accordingly (by calling uart_suspend_port() in sci_suspend()). The only
>> missing setting is the reset signal. For this assert/de-assert the reset
>> signal on driver suspend/resume.
>>
>> In case the no_console_suspend is specified by the user, the registers need
>> to be saved on suspend path and restore on resume path. To do this the
>> sci_console_setup() function was added. There is no need to cache/restore
>> the status or FIFO registers. Only the control registers. To differentiate
>> b/w these, the struct sci_port_params::regs was updated with a new member
>> that specifies if the register needs to be chached on suspend. Only the
>> RZ_SCIFA instances were updated with this new support as the hardware for
>> the rest of variants was missing for testing.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>> ---
>>
>> Changes in v4:
>> - none
>
>
> Why are you combining serial patches with DTS? Greg applies entire set
> thus you *cannot* send him DTS.
It's v4. The initial set contained fixes for serial, support for RZ/G3S
(including clocks and dtsi), all that was needed for the enabled RZ/G3S
serial IPs. Fixes were posted separately (as requested), the other bringup
patches were integrated and this is what remained. I chose it like this for
version continuity.
Thank you,
Claudiu
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2025-01-22 10:09 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-20 13:09 [PATCH v4 0/4] Add support for the rest of Renesas RZ/G3S serial interfaces Claudiu
2025-01-20 13:09 ` [PATCH v4 1/4] serial: sh-sci: Update the suspend/resume support Claudiu
2025-01-21 8:54 ` Krzysztof Kozlowski
2025-01-22 10:09 ` Claudiu Beznea [this message]
2025-01-24 10:53 ` Geert Uytterhoeven
2025-01-27 8:44 ` Claudiu Beznea
2025-01-27 9:19 ` Geert Uytterhoeven
2025-01-27 12:23 ` Claudiu Beznea
2025-01-27 16:44 ` Geert Uytterhoeven
2025-01-20 13:09 ` [PATCH v4 2/4] arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches Claudiu
2025-01-24 12:51 ` Geert Uytterhoeven
2025-01-20 13:09 ` [PATCH v4 3/4] arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 Claudiu
2025-01-24 12:53 ` Geert Uytterhoeven
2025-01-20 13:09 ` [PATCH v4 4/4] arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 Claudiu
2025-01-24 12:56 ` Geert Uytterhoeven
2025-01-24 13:09 ` Claudiu Beznea
2025-01-24 19:15 ` Geert Uytterhoeven
2025-01-27 8:45 ` Claudiu Beznea
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