From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D05FE42A99; Wed, 9 Jul 2025 18:18:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752085085; cv=none; b=eSRtYzqMgkbrJ44wrvfx9S0LD0+YoebNo7BWAjqBT1eE5cD6T7VIN0QUshXdfUXTh0bxVWyIoseDhTsQg0zvMU8FKFyBDZSM5zF6pWgBEQd3iqhBZ7MdTxrYJuhl4JNw0Ehfv5mHQBGbyR0M+0mp9iKs1qrnbmwBbv5eQGLjf3c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752085085; c=relaxed/simple; bh=S6zZ5G800kN21belO3KkHrdTmOtxbk5yt+VXUtC+gDw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=TkRx2XgbfXmkShjTizdb/Lx5Bf+W8YUOI2NrtPq7H5YvnKwIxRzWEhLXb9/D2/vWxcGjgV1K+mjPINhHvk7cUCa9jnqHUaAYiPDy97/xOfp20Sc1xFh8G7UTZI2izDsdJ84JPVCysQCv03dRCSZRLfAKuIrTWSGxNPCFBdv8yJw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FJkuOg3C; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FJkuOg3C" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7FFC2C4CEEF; Wed, 9 Jul 2025 18:18:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752085085; bh=S6zZ5G800kN21belO3KkHrdTmOtxbk5yt+VXUtC+gDw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=FJkuOg3COKN7dPW4oz/ySDbAABNsJ13Cii/J71dixJEjfe0KBNp92mCrjzTgklLMy OibKFiSXySXtDhDCBKT+m5a7EayRNOU1lBSuGBg/iiedtgYmcHoKMmi1qUjwKJxDIS Zl9MwlMlcu4ndDLvw3Di5jyWZkQ57zya2+kUlj20yCaPLcuga/boz7A22wDfRRTIcZ 5frOLbxu0JIp4Vyurdo102elpIUkJrsWQKRmX0aLpD+5J/Dg6o3iEZFRuS+qo0tmsR 0MrDGQYV5jyWta9AlC9Sxo5pnXQq+lgfv3SgiQu5zUaNDnYhYm3CPRaiiqdhkxfHHc +H3CkSmD0ybdw== Message-ID: Date: Wed, 9 Jul 2025 20:18:01 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] memory: tegra: Add Tegra264 support To: Thierry Reding Cc: Rob Herring , Conor Dooley , Jonathan Hunter , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250708105245.1516143-1-thierry.reding@gmail.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 09/07/2025 14:18, Thierry Reding wrote: > On Tue, Jul 08, 2025 at 12:52:41PM +0200, Thierry Reding wrote: >> From: Thierry Reding >> >> This set of patches extends the DT bindings for the memory controller >> and external memory controller for Tegra264 and add the necessary DT >> headers with memory client and stream ID definitions. >> >> The driver changes in patch 4 are mostly an extension of existing code >> and the bulk consists of the memory client table for the new chip as >> well as the bandwidth manager calculations. >> >> Thierry >> >> Sumit Gupta (3): >> dt-bindings: memory: tegra: Add Tegra264 support >> dt-bindings: memory: tegra: Add Tegra264 definitions >> memory: tegra: Add Tegra264 MC and EMC support >> >> Thierry Reding (1): >> dt-bindings: memory: tegra: Add Tegra264 stream IDs >> >> .../nvidia,tegra186-mc.yaml | 65 +++- >> drivers/memory/tegra/Makefile | 2 + >> drivers/memory/tegra/mc.c | 5 +- >> drivers/memory/tegra/mc.h | 9 +- >> drivers/memory/tegra/tegra186-emc.c | 5 +- >> drivers/memory/tegra/tegra186.c | 17 +- >> drivers/memory/tegra/tegra264-bwmgr.h | 50 +++ >> drivers/memory/tegra/tegra264.c | 313 ++++++++++++++++++ >> include/dt-bindings/memory/nvidia,tegra264.h | 136 ++++++++ >> 9 files changed, 594 insertions(+), 8 deletions(-) >> create mode 100644 drivers/memory/tegra/tegra264-bwmgr.h >> create mode 100644 drivers/memory/tegra/tegra264.c >> create mode 100644 include/dt-bindings/memory/nvidia,tegra264.h > > Krzysztof, > > There's a dependency between this series and a series adding device tree > files for Tegra264 (both the driver and DTS files include the memory > client IDs in dt-bindings/memory/nvidia,tegra264.h), so I think it'd be > easiest for me to take the driver patches here through the Tegra tree as > well. > > Let me know if that works for you or not. Works for me. I don't have anything for Tegra memory controllers and it's close to end of cycle. Let me look at the patches and ack/comment. Best regards, Krzysztof