From: Icenowy Zheng <uwu@icenowy.me>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
Fu Wei <wefu@redhat.com>, Chen Wang <unicorn_wang@outlook.com>,
devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
linux-renesas-soc@vger.kernel.org
Subject: Re: [RFC v2 6/6] riscv: dts: thead: convert isa detection to new properties
Date: Tue, 26 Sep 2023 11:15:27 +0800 [thread overview]
Message-ID: <c80bf6710d8cc7a1c0d49d52ad6410d04c6a0858.camel@icenowy.me> (raw)
In-Reply-To: <20230925-semantic-euphemism-f0c7e85ac317@spud>
在 2023-09-25星期一的 16:59 +0100,Conor Dooley写道:
> On Sun, Sep 24, 2023 at 07:22:30AM +0800, Icenowy Zheng wrote:
> > 在 2023-09-22星期五的 09:13 +0100,Conor Dooley写道:
> > > From: Conor Dooley <conor.dooley@microchip.com>
> > >
> > > Convert the th1520 devicetrees to use the new properties
> > > "riscv,isa-base" & "riscv,isa-extensions".
> > > For compatibility with other projects, "riscv,isa" remains.
> > >
> > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > ---
> > > arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++
> > > 1 file changed, 12 insertions(+)
> > >
> > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi
> > > b/arch/riscv/boot/dts/thead/th1520.dtsi
> > > index ce708183b6f6..723f65487246 100644
> > > --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> > > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> > > @@ -20,6 +20,9 @@ c910_0: cpu@0 {
> > > compatible = "thead,c910", "riscv";
> > > device_type = "cpu";
> > > riscv,isa = "rv64imafdc";
> > > + riscv,isa-base = "rv64i";
> > > + riscv,isa-extensions = "i", "m", "a",
> > > "f",
> > > "d", "c", "zicntr", "zicsr",
> > > + "zifencei",
> > > "zihpm";
> >
> > Zfh is supported by T-Head C9xx with float too.
>
> You say xx, so just to be sure: Is it always supported, or only with
> some config for the IP (I wanna know if I need to look out for it
> while
> reviewing other SoCs etc)?
I think it's grouped with FD.
> Also, do you have a link to the documentation for it? English is the
> only relevant language I speak, so if the doc is in Chinese, I'll
> need
> some help!
Sorry, but T-Head's official document [1] is only in Chinese. In
addition, in this document half-float is listed as a "T-Head
extension", but the encoding matches Zfh. See 15.6 Appendix B-6 Half
Float (15.6 附录 B-6 浮点半精度指令术语) .
[1]
https://github.com/T-head-Semi/openc910/blob/main/doc/%E7%8E%84%E9%93%81C910%E7%94%A8%E6%88%B7%E6%89%8B%E5%86%8C.pdf
>
> > In addition, should X extensions get listed here?
>
> Yes, but someone who cares about documenting these extensions should
> do
> it ;)
Well at least a bunch of Xthead's are now documented.
Maybe they will get appended after this patchset get introduced.
By the way, how to deal with the draft V of C9xx?
>
> Thanks,
> Conor.
next prev parent reply other threads:[~2023-09-26 3:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 8:13 [RFC v2 0/6] riscv,isa-extensions additions Conor Dooley
2023-09-22 8:13 ` [RFC v2 1/6] riscv: dts: microchip: convert isa detection to new properties Conor Dooley
2023-09-22 8:13 ` [RFC v2 2/6] riscv: dts: sifive: " Conor Dooley
2023-09-25 17:38 ` Samuel Holland
2023-09-22 8:13 ` [RFC v2 3/6] riscv: dts: starfive: " Conor Dooley
2023-09-22 8:13 ` [RFC v2 4/6] riscv: dts: renesas: " Conor Dooley
2023-09-22 8:13 ` [RFC v2 5/6] riscv: dts: allwinner: " Conor Dooley
2023-09-24 19:42 ` Jernej Škrabec
2023-09-22 8:13 ` [RFC v2 6/6] riscv: dts: thead: " Conor Dooley
2023-09-23 7:50 ` Guo Ren
2023-09-23 10:25 ` Conor Dooley
2023-10-09 1:01 ` Guo Ren
2023-09-23 23:22 ` Icenowy Zheng
2023-09-25 15:59 ` Conor Dooley
2023-09-26 3:15 ` Icenowy Zheng [this message]
2023-09-26 9:14 ` Conor Dooley
2023-10-04 12:13 ` Jisheng Zhang
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