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([2a02:810d:15c0:828:99ed:4575:6001:8bda]) by smtp.gmail.com with ESMTPSA id z21-20020a056402275500b00501d73cfc86sm5647456edd.9.2023.04.04.03.12.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Apr 2023 03:12:08 -0700 (PDT) Message-ID: Date: Tue, 4 Apr 2023 12:12:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH v5 2/6] dt-bindings: ufs: qcom: Add ICE phandle Content-Language: en-US To: Abel Vesa Cc: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , Adrian Hunter , "James E . J . Bottomley" , "Martin K . Petersen" , Herbert Xu , "David S . Miller" , Eric Biggers , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-scsi@vger.kernel.org References: <20230403200530.2103099-1-abel.vesa@linaro.org> <20230403200530.2103099-3-abel.vesa@linaro.org> <9fc90c8b-9234-84fa-7dab-fee9de2b9813@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 04/04/2023 10:59, Abel Vesa wrote: > On 23-04-04 07:41:55, Krzysztof Kozlowski wrote: >> On 03/04/2023 22:05, Abel Vesa wrote: >>> Starting with SM8550, the ICE will have its own devicetree node >>> so add the qcom,ice property to reference it. >>> >>> Signed-off-by: Abel Vesa >>> --- >>> >>> The v4 is here: >>> https://lore.kernel.org/all/20230327134734.3256974-4-abel.vesa@linaro.org/ >>> >>> Changes since v4: >>> * Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce >>> it while making sure none of the other platforms are allowed to use it >> >> Why? > > SM8550 will be the first platform to use the new DT bindings w.r.t ICE. This I understand, but why other platforms cannot use it? > >> >> Also, this does not solve my previous question still. > > Well, the clocks are not added for the a few platforms (which include > SM8550). Same for 'ice' reg range.. So the only thing left is to > enforce the qcom,ice property availability only for SM8550. I believe > it solves the mutual exclusiveness of the "ice" reg range along with the > clocks versus the qcom,ice property, by enforcing at compatible level. Ah, I think I understand. That would work except I don't understand why enforcing qcom,qce only for specific, new SoCs. Assuming it is a correct hardware representation, we want it for everyone, don't we? Best regards, Krzysztof