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[79.139.233.37]) by smtp.googlemail.com with ESMTPSA id q26sm7124334lfb.26.2019.12.22.13.55.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 22 Dec 2019 13:55:27 -0800 (PST) Subject: Re: [PATCH v5 07/19] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock To: Sowjanya Komatineni , thierry.reding@gmail.com, jonathanh@nvidia.com, broonie@kernel.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, mperttunen@nvidia.com, gregkh@linuxfoundation.org, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: pdeschrijver@nvidia.com, pgaikwad@nvidia.com, spujar@nvidia.com, josephl@nvidia.com, daniel.lezcano@linaro.org, mmaddireddy@nvidia.com, markz@nvidia.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <1576880825-15010-1-git-send-email-skomatineni@nvidia.com> <1576880825-15010-8-git-send-email-skomatineni@nvidia.com> From: Dmitry Osipenko Message-ID: Date: Mon, 23 Dec 2019 00:55:26 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.3.0 MIME-Version: 1.0 In-Reply-To: <1576880825-15010-8-git-send-email-skomatineni@nvidia.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 21.12.2019 01:26, Sowjanya Komatineni пишет: > Tegra PMC has blink functionality that allows 32KHz clock out to > blink pin of the Tegra. > > This patch adds id for this blink clock to use for enabling or > disabling blink output through device tree. > > Signed-off-by: Sowjanya Komatineni > --- > include/dt-bindings/soc/tegra-pmc.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/soc/tegra-pmc.h b/include/dt-bindings/soc/tegra-pmc.h > index f7c866404456..a99a457471ee 100644 > --- a/include/dt-bindings/soc/tegra-pmc.h > +++ b/include/dt-bindings/soc/tegra-pmc.h > @@ -9,7 +9,8 @@ > #define TEGRA_PMC_CLK_OUT_1 0 > #define TEGRA_PMC_CLK_OUT_2 1 > #define TEGRA_PMC_CLK_OUT_3 2 > +#define TEGRA_PMC_CLK_BLINK 3 > > -#define TEGRA_PMC_CLK_MAX 3 > +#define TEGRA_PMC_CLK_MAX 4 > > #endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */ > Could you please explain the reason of separating CLK_OUT and BLINK PMC patches? Also, you only documented CLK_OUT clocks in the DT binding and no BLINK.