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From: <Ashish.Yadav@infineon.com>
To: <linux@roeck-us.net>, <wsa+renesas@sang-engineering.com>,
	<Shirley.Lin@infineon.com>, <robh@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <jdelvare@suse.com>,
	<corbet@lwn.net>, <patrick.rudolph@9elements.com>,
	<bhelgaas@google.com>, <ninad@linux.ibm.com>, <festevam@denx.de>,
	<devicetree@vger.kernel.org>, <linux-hwmon@vger.kernel.org>,
	<linux-i2c@vger.kernel.org>, <Mills.Liu@infineon.com>,
	<Ian.Fang@infineon.com>
Subject: RE: Update driver xdpe152c4.c
Date: Tue, 8 Apr 2025 03:28:35 +0000	[thread overview]
Message-ID: <c8b9aa8e579e4892a35542f59cff44e4@infineon.com> (raw)
In-Reply-To: <3df0bfff-413d-4ad5-a3a8-39a7bb7a90ba@roeck-us.net>

Hi Guenter, Wolfram and Mukesh, 

I hope you are doing well.
Thanks for your suggestion/feedback. 

Sorry for the inconvenience.
This patch is still in the testing phase and not the final one, that is why  " pr_warn()" is used for debug purposes. 

We will get back to you with the final patch with proper process as suggested by you. 

With Best Regards
   Ashish Yadav


-----Original Message-----
From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck
Sent: 07 April 2025 20:06
To: Wolfram Sang <wsa+renesas@sang-engineering.com>; Lin Shirley (SMD C3 GC TM DCO) <Shirley.Lin@infineon.com>; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; jdelvare@suse.com; corbet@lwn.net; patrick.rudolph@9elements.com; bhelgaas@google.com; ninad@linux.ibm.com; festevam@denx.de; devicetree@vger.kernel.org; linux-hwmon@vger.kernel.org; linux-i2c@vger.kernel.org; Liu Mills (SMD C3 GC TM DCO) <Mills.Liu@infineon.com>; Yadav Ashish (PSS PCS RD FW HD) <Ashish.Yadav@infineon.com>; Fang Ian (SMD C3 GC TM DCO) <Ian.Fang@infineon.com>
Subject: Re: Update driver xdpe152c4.c

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On 4/7/25 07:01, Guenter Roeck wrote:
> On 4/6/25 23:15, Wolfram Sang wrote:
>>
>>> Please help to review the attached Linux Kernel patch for xdpe152xx driver.
>>
>> To shorten things, you could return -EAGAIN as an error code, then 
>> the I2C core will retry the message for you. Within the configured 
>> limits for the controller.
>>
>
> The patch neglects to state the _reason_ for the change.
>
> I'd like to know what causes the problem before applying a change like this.
> I suspect that the chip needs either a delay between accesses or a 
> delay after a write. Both are supported by the PMBus core.
>

And this is a complete no-go:

+       if (ret < 0)
+               pr_warn("PMBUS READ ERROR:%d\n", ret);

It isn't even dev_warn(), and I am not going to accept patches which will clog the kernel log for every single error return. Just imagine how the kernel log would look like if every driver would log errors like this.

Guenter


  reply	other threads:[~2025-04-08  3:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-07  3:52 Update driver xdpe152c4.c Shirley.Lin
2025-04-07  4:59 ` Mukesh Kumar Savaliya
2025-04-07  6:12   ` Wolfram Sang
2025-04-07  6:58     ` Mukesh Kumar Savaliya
2025-04-07  7:23       ` Shirley.Lin
2025-04-07  6:15 ` Wolfram Sang
2025-04-07 14:01   ` Guenter Roeck
2025-04-07 14:36     ` Guenter Roeck
2025-04-08  3:28       ` Ashish.Yadav [this message]
2025-04-08  4:06         ` Guenter Roeck

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