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[...] > arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 47 ++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > index 06c0af0aa317..bac3c8772e0a 100644 > --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi > @@ -713,6 +713,53 @@ blsp2_i2c6: i2c@f9968000 { > #size-cells = <0>; > }; > > + usb3: usb@f9200000 { > + compatible = "qcom,msm8974-dwc3", "qcom,snps-dwc3"; > + reg = <0xf9200000 0xfc000>; > + interrupts = , > + , > + ; > + interrupt-names = "dwc_usb3", "pwr_event", > + "hs_phy_irq"; 1 a line (also in a couple cases below) > + clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, > + <&gcc GCC_USB30_MASTER_CLK>, > + <&gcc GCC_USB30_SLEEP_CLK>, > + <&gcc GCC_USB30_MOCK_UTMI_CLK>; > + clock-names = "cfg_noc", "core", "sleep", "mock_utmi"; > + assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, > + <&gcc GCC_USB30_MASTER_CLK>; > + assigned-clock-rates = <60000000>, <125000000>; > + resets = <&gcc GCC_USB_30_BCR>; > + phys = <&usb3_hs_phy>, <&usb3_ss_phy>; > + phy-names = "usb2-phy", "usb3-phy"; > + snps,dis_u2_susphy_quirk; > + snps,dis_enblslpm_quirk; We usually have 10x as many quirks here, I guess +Wesley may not remember the suitable values at this point, but I think he mentioned there is a set of "common defaults" > + status = "disabled"; \n before status, please Needs power-domains + required-opps > + }; > + > + usb3_hs_phy: phy@f92f8800 { I don't like re-claiming the memory space.. Should we make these PHYs the subnodes of the qc glue? Konrad