From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 185FEC38A02 for ; Sat, 29 Oct 2022 21:51:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229616AbiJ2Vvk (ORCPT ); Sat, 29 Oct 2022 17:51:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbiJ2Vvk (ORCPT ); Sat, 29 Oct 2022 17:51:40 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87492205CB for ; Sat, 29 Oct 2022 14:51:38 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id k19so12141122lji.2 for ; Sat, 29 Oct 2022 14:51:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=gfWRj6q8gtwExuU6xtlGX9JVKuZNXAjKxYdaU4R5p6o=; b=Urs78GnGtsyNOWOiR2t+pEDSq2Z8yNcr3WamFfOLGkgYRvPEg9oQwLK0jyxe/FMDJo s0JyfD22DW/aGQGfs09wLfnoUDenoO1Eu2W4ztQgXBI3RBJh7WJrmYDDizIUbahEU/mq qeaHYkUvaiSQXb1NG3Rmej1NSQcVadMrv84HJfcy7sG/esimdesMcx52tFoXAmOpH7QI 5yAoElrSH9W0xv5x+X7jID6OnEh1jZlgHwq4hfl9WrvlXO+o6EU1PuZ/GATtqFre0gFv 4U2BGfCYDim5AWL6Xwn4obdsyRlgKfVMOPJkE4ohlaS++Y/v6pfZfMlGeDvwFsW8Y542 ELew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=gfWRj6q8gtwExuU6xtlGX9JVKuZNXAjKxYdaU4R5p6o=; b=18PoGyaIPFg7r1AuVJZXC5StwU6gtdrV2wVZCqxjgo8BYG7t8DA38nafUONRFqqJr+ MvlHgM4q8mpABjoGwQGyJ16GKeHW2o+X5jGd9PVCDkL0IhfxCTB6+Br3gTYVqCSfNBMk IRdt6qM9mdbyAwotxe47It6mrXA1QCZB1HjNT7hj+1zFHKthEc5AAd+EzLYZcf7Io6Xw HnmVKAiNsMh0yfNEQUs16rCA9IKZ8ox4DVvwStBGYEPD+CoEKQmKwWwhin63Ev3C9G3C vGsI5/NaCdEL1nciMFGb3+XCAkwrFNCJ6xYhmrAwBFfNwUeUxkPBuWTKVDJdYmoV+4Mq O1lA== X-Gm-Message-State: ACrzQf3R4DYLpdOGeYFLsXvokrByK0IvS55IT5ZtWMCUYZrqAP1XkIHu ca2s5swjqvXiZKDT7Pb8JQ9bEQ== X-Google-Smtp-Source: AMsMyM6EIQfgG7R9j2+qWL5llQjlUrUy7Cw1VNT2F+skyNf47ti2pq4NwjqNhmv6eK0NYAtNjd3lZQ== X-Received: by 2002:a2e:a602:0:b0:26f:ce8d:30cc with SMTP id v2-20020a2ea602000000b0026fce8d30ccmr2438231ljp.310.1667080296971; Sat, 29 Oct 2022 14:51:36 -0700 (PDT) Received: from [10.27.10.248] ([195.165.23.90]) by smtp.gmail.com with ESMTPSA id m2-20020a056512358200b004acff58a951sm453375lfr.133.2022.10.29.14.51.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Oct 2022 14:51:36 -0700 (PDT) Message-ID: Date: Sun, 30 Oct 2022 00:51:35 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH 02/15] phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode Content-Language: en-GB To: Manivannan Sadhasivam , martin.petersen@oracle.com, jejb@linux.ibm.com, andersson@kernel.org, vkoul@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, quic_cang@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org References: <20221029141633.295650-1-manivannan.sadhasivam@linaro.org> <20221029141633.295650-3-manivannan.sadhasivam@linaro.org> From: Dmitry Baryshkov In-Reply-To: <20221029141633.295650-3-manivannan.sadhasivam@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 29/10/2022 17:16, Manivannan Sadhasivam wrote: > Add separate tables_hs_b instance to allow the PHY driver to configure the > PHY in HS Series B mode. The individual SoC configs need to supply the > serdes register setting in tables_hs_b and the UFS driver can request the > Series B mode by calling phy_set_mode() with mode set to PHY_MODE_UFS_HS_B. > > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov > --- > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > -- With best wishes Dmitry