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charset="UTF-8"; format=flowed Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAyMDExMCBTYWx0ZWRfXzcH3CH/Avpc7 Qe4o/KP+jDUFF9ShHoftzQLYVKDYfL4cU3cF1y6JOpA0Xl7Rga0GprH5GX4shM8mDnoYoQXC4VI pIbzi7kCqY2ZTEyC84EDc/+uEYoCxcI= X-Authority-Analysis: v=2.4 cv=M/l97Sws c=1 sm=1 tr=0 ts=6a981603 cx=c_pps a=U89Fr+s++Oy0xugnv2TZpA==:117 a=iwqwCZQqcuTv3JOpYdM7/Q==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=V5UXEbMT0ywA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Z8NIEmU8O1QQgoT56wFK:22 a=fPAWb5peG099m5CrUpKH:22 a=RpNjiQI2AAAA:8 a=MKqIecrYLlFEDdW3oaEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: 2UeAJFAIFt4WeBsHFbzONtRaRQXbIxSa X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAyMDExMCBTYWx0ZWRfXycNyJpHchqSQ dMYVLBzDdczKe4E1fyuYarIby6buWrnOZlLrjoVaU0FvEJhM+AFOuFxlRqXpFz2/rQcv9furcXc QOk0bnCReLvOHLTCKH/PK3uwMhqF9ZTliYvHNXx0UQtM8MUyHbk/x+oitErqqjgmet0D+HdddMS b/x8f2rneMOgcWxKwc/W1WMFa8XQajChjpmyA9sn0pp7yCNotnOy2re7X9+p0bu151vZFmS2gSV ay96h4NGcYMaWVYhgZhBK40IFsLeIGHZX1f2q+WmtriGW1JYXe3wrSyQ5q0F+OxTBVPaVwvLEg3 yMwmOs6t0W4rf49c70IJFfZ5SaSV/wA5oqsfMV+gkPRkLDC6QND9OGuFToCjwMTFk9GbOxzaNX5 1ml20CpTNCeYuOEYDC/e7N/cQemecOMtmLJ8WLDpuZlSTZBjj6RwG5yWs03PB2lOVs3UsUFpoiF xmxmdBDvRp0MJBaTO+A== X-Proofpoint-ORIG-GUID: 2UeAJFAIFt4WeBsHFbzONtRaRQXbIxSa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-02_02,2026-09-01_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 spamscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609020110 Hi Alvin, On 28/08/26 17:20, Alvin =C5=A0ipraga wrote: > Hi Rahul, On Fri, Aug 28, 2026 at 03:=E2=80=8A36:=E2=80=8A14PM +0530, Rah= ul Sharma=20 > wrote: > Add binding for the event mux router of TI's K3 based SoC=20 > AM62L. [.=E2=80=8A.=E2=80=8A.=E2=80=8A] > + ti,reg-mask-val: > + $ref: /s= chemas/types.=E2=80=8Ayaml#/=20 > definitions/uint32-matrix > + items:=E2=80=8A >=20 >=20 > Hi Rahul, >=20 > On Fri, Aug 28, 2026 at 03:36:14PM +0530, Rahul Sharma wrote: >> Add binding for the event mux router of TI's K3 based SoC AM62L. >=20 > [...] >=20 >> + ti,reg-mask-val: >> + $ref: /schemas/types.yaml#/definitions/uint32-matrix >> + items: >> + items: >> + - description: Register offset (relative to reg base) >> + - description: Bit mask for the mux control bits >> + - description: Value to write when mux is active (state 1) >> + minItems: 1 >> + description: | >> + Array of triplets specifying register offset, mask, and value for= each >> + mux control. Each triplet contains: >> + - register offset (relative to reg base) >> + - bit mask for the mux control bits >> + - value to write when mux is active (state 1) >=20 > As I understand it, you are creating a binary (0=3Doff / 1=3Don) mux cont= rol > for each reg-mask-val triplet. But couldn't you just use the mmio-mux > binding/driver for this, delegating the value setting to the consumer? >=20 > [...] >=20 >> +examples: >> + - | >> + #include >> + >> + // Example 1: TI AM62L GPIO Mux Router >> + mux-controller@a00000 { >> + compatible =3D "ti,am62l-event-mux-router"; >> + reg =3D <0xa00000 0x400>; >> + #mux-control-cells =3D <1>; >> + >> + /* Mux Register addresses: 0xa00004 + (J =C3=97 4) */ >> + /* GPIO0_40 -> BCDMA trigger 15 */ >> + ti,reg-mask-val =3D <0x40 0x000ff 0x00028>; >> + idle-states =3D <0>; >> + }; >=20 > Alternatively, >=20 > foo_mux: mux-controller { > compatible =3D "mmio-mux"; > reg =3D <...>; > #mux-control-cells =3D <1>; > mux-reg-masks =3D <0x40 0x000ff>; > idle-states =3D <0>; > }; >=20 > toto-consumer { > compatible =3D "toto"; > mux-states =3D <&foo_mux 0 0x00028>; > mux-state-names =3D "gpio-trigger"; > }; >=20 > What's wrong with that? We wanted to go with this approach initially, but we had trouble=20 assigning consumer node(s) because of lot of modifications will be=20 needed in already existing consumer nodes. So, we came up with another plan of not using a consumer node at all to=20 enable this. Now in this approach you can see, the mux-controller itself=20 assigns that value to mux register and takes care of routing. Also If you look at the driver, to establish a mux route path we need to=20 2 things to be done 1. Set the mux register value, this comes from DT=20 property 2. Enable the mux route by setting 16th bit in mux register. And this cannot be accommodated in current mmio-mux driver. BR, Rahul >=20 > Kind regards, > Alvin >=20