Re: [PATCH v6 8/8] iio: adc: ad4030: Support common-mode channels with SPI offloading

["Nuno Sá" <noname.nuno@gmail.com>]

On Wed, 2025-10-29 at 15:11 -0300, Marcelo Schmitt wrote:
> On 10/27, Jonathan Cameron wrote:
> > On Mon, 20 Oct 2025 16:15:39 -0300
> > Marcelo Schmitt <marcelo.schmitt@analog.com> wrote:
> > 
> > > AD4030 and similar devices can read common-mode voltage together with
> > > ADC sample data. When enabled, common-mode voltage data is provided in a
> > > separate IIO channel since it measures something other than the primary
> > > ADC input signal and requires separate scaling to convert to voltage
> > > units. The initial SPI offload support patch for AD4030 only provided
> > > differential channels. Now, extend the AD4030 driver to also provide
> > > common-mode IIO channels when setup with SPI offloading capability.
> > > 
> > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
> > > ---
> > > New patch.
> > > I hope this works for ADCs with two channels. It's not clear if works as
> > > expected with current HDL and single-channel ADCs (like ADAQ4216).
> > > 
> > > The ad4630_fmc HDL project was designed for ADCs with two channels and
> > > always streams two data channels to DMA (even when the ADC has only one
> > > physical channel). Though, if the ADC has only one physical channel, the
> > > data that would come from the second ADC channel comes in as noise and
> > > would have to be discarded. Because of that, when using single-channel
> > > ADCs, the ADC driver would need to use a special DMA buffer to filter out
> > > half of the data that reaches DMA memory. With that, the ADC sample data
> > > could be delivered to user space without any noise being added to the IIO
> > > buffer. I have implemented a prototype of such specialized buffer
> > > (industrialio-buffer-dmaengine-filtered), but it is awful and only worked
> > > with CONFIG_IIO_DMA_BUF_MMAP_LEGACY (only present in ADI Linux tree). Usual
> > > differential channel data is also affected by the extra 0xFFFFFFFF data
> > > pushed to DMA. Though, for the differential channel, it's easier to see it
> > > shall work for two-channel ADCs (the sine wave appears "filled" in
> > > iio-oscilloscope).
> > > 
> > > So, I sign this, but don't guarantee it to work.
> > 
> > So what's the path to resolve this?  Waiting on HDL changes or not support
> > those devices until we have a clean solution?
> 
> Waiting for HDL to get updated I'd say.

Agree. We kind of control the IP here so why should we do awful tricks in
SW right :)? At the very least I would expect hdl to be capable to discard the
data in HW.

> 
> > 
> > Also, just to check, is this only an issue with the additional stuff this
> > patch adds or do we have a problem with SPI offload in general (+ this
> > IP) and those single channel devices?
> 
> IMO, one solution would be to update the HDL project for AD4630 and similar ADCs
> to not send data from channel 2 to DMA memory when single-channel ADCs are
> connected. Another possibility would be to intercept and filter out the extra
> data before pushing it to user space. My first attempt of doing that didn't
> work out with upstream kernel but I may revisit that.

I'm also confused. Is this also an issue with the current series without common mode?

If I'm getting things right, one channel ADCs pretty much do not work right now with
spi offload?

If the above is correct I would just not support it for 1 channel ADCs.

- Nuno Sá