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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Vadym Kochan <vadym.kochan@plvision.eu>,
	Hu Ziji <huziji@marvell.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Elad Nachman <enachman@marvell.com>
Subject: Re: [PATCH 3/3] arm64: dts: marvell: Add DTSI to fix Xenon SDHCI 2G limitation on AC5 SoC
Date: Mon, 8 Aug 2022 12:21:36 +0300	[thread overview]
Message-ID: <cb74b5e0-2243-5afc-dd8e-7b024ca3e3da@linaro.org> (raw)
In-Reply-To: <20220806085818.9873-4-vadym.kochan@plvision.eu>

On 06/08/2022 11:58, Vadym Kochan wrote:
> +
> +	soc {
> +		sdhci: sdhci@805c0000 {
> +			compatible = "marvell,ac5-sdhci";
> +			reg = <0x0 0x805c0000 0x0 0x300>;
> +			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cnm_clock>;
> +			clock-names = "core";
> +			marvell,ac5-sdhci-dma-bounce-pool = <&sdhci_dma_bounce_pool>;

Undocumented property.

Best regards,
Krzysztof

      reply	other threads:[~2022-08-08  9:21 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-06  8:58 [PATCH 0/3] mmc: xenon-sdhci: Try to fix 2G address limitation on AC5 SoC Vadym Kochan
2022-08-06  8:58 ` [PATCH 1/3] dt-bindings: mmc: xenon: Add compatible string for Xenon SDHCI " Vadym Kochan
2022-08-08  9:18   ` Krzysztof Kozlowski
2022-08-06  8:58 ` [PATCH 2/3] mmc: sdhci-xenon: Try to fix 2G address limitation " Vadym Kochan
2022-08-08  9:20   ` Krzysztof Kozlowski
2022-08-06  8:58 ` [PATCH 3/3] arm64: dts: marvell: Add DTSI to fix Xenon SDHCI 2G " Vadym Kochan
2022-08-08  9:21   ` Krzysztof Kozlowski [this message]

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