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Fri, 15 May 2026 08:28:37 -0700 (PDT) X-Received: by 2002:a05:6a20:2454:b0:3a3:addc:8f47 with SMTP id adf61e73a8af0-3b22ec64553mr5222414637.42.1778858916923; Fri, 15 May 2026 08:28:36 -0700 (PDT) Received: from [192.168.1.10] ([122.164.84.236]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c82bb123986sm6209094a12.32.2026.05.15.08.28.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 May 2026 08:28:36 -0700 (PDT) Message-ID: Date: Fri, 15 May 2026 20:58:30 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] dt-bindings: arm-smmu: qcom: Add compatible for IPQ9650 SoC To: Krzysztof Kozlowski , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260512-ipq9650_smmu_binding-v1-1-04defdaa140c@oss.qualcomm.com> <39588541-b6f8-4697-9787-4b42df21156b@kernel.org> Content-Language: en-US From: Kathiravan Thirumoorthy In-Reply-To: <39588541-b6f8-4697-9787-4b42df21156b@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE1MDE1NyBTYWx0ZWRfX+tURtQtB/Qa7 BpesVjh3F9ly4ZWNMn+Pybwomeulc3il2ODjPP1DsAiULcglcNXuqkcJd+vEH+fxiNl/k10RmUk Wt538JLMOcIeqB9ZJMVBMo+S98ogrSnKupMr8MZkY6lGgxQ5u8gkZxkr35TEvBvo34BjeJJcMg2 kR12AxoyllgEzuyJT4X5TsJPdPcacgKUiKevWz2I93YD1YkzTYSZKeaYIkv7dwuiikFx+SqjX1E K8Ea0/OhjSobMkH1vvd3AVb5obJsb2Q1+DkLHT1y7do7s9kTRN63Kai/91Ha2F2gfDUOeQHzksk VYcYCuD0SI/KBar4djs0uQVWOd96Dsx7cGLoJIJOYGPf4phsWqMpxazGzXbkgJCLzEyNS8Yi/43 hSznJqzoyeWVgx9uq7+uyTA1fXBTSMJwy2jz5c6tQxCXurl0JkypwnpRq+eR4FD0ju1Qj0ctIqZ c2hNqhM1oq+aD+WJ6GA== X-Authority-Analysis: v=2.4 cv=cZXiaHDM c=1 sm=1 tr=0 ts=6a073ba6 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=pcck7Iv2+kD8UxzcD71x3w==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=skYpixVSqG8Zg7K71KQA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: TZ0zUBSvWituywmEz7HqCukHdhXM6eL1 X-Proofpoint-ORIG-GUID: TZ0zUBSvWituywmEz7HqCukHdhXM6eL1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-15_03,2026-05-15_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 phishscore=0 suspectscore=0 adultscore=0 bulkscore=0 impostorscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605150157 On 5/15/2026 8:46 PM, Krzysztof Kozlowski wrote: > On 15/05/2026 15:30, Kathiravan Thirumoorthy wrote: >> On 5/12/2026 12:17 PM, Kathiravan Thirumoorthy wrote: >>> Qualcomm IPQ9650 SoC include APPS SMMU that implements arm,mmu-500. >>> Document the compatible for the same. >> Kindly ignore this patch. I will repost along with DTSI changes once it >> is validated again! > Preemptively, I dropped all your patches from Patchwork based on earlier > comments. Now I have proof that I should be doing that for future as > well. :/ I understand your frustration. Apologies for that. Please note that, I have validated all the changes before posting. In this case, when I was cross checking the HW doc for some other details and I noticed that SMMU interrupts are changed and HW folks haven't notified us. Hence I wanted to re-validate the change and post it. I don't want to change the binding (if any such case arises), hence requested to drop this patch. Hope this helps. > > Best regards, > Krzysztof