From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Jia Jie Ho <jiajie.ho@starfivetech.com>,
Olivia Mackall <olivia@selenic.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor.dooley@microchip.com>,
linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 3/3] riscv: dts: starfive: Add TRNG node for VisionFive 2
Date: Wed, 21 Dec 2022 10:48:07 +0100 [thread overview]
Message-ID: <cbbf719b-a027-f91b-bd2c-6e6b43447b97@linaro.org> (raw)
In-Reply-To: <20221221090819.1259443-4-jiajie.ho@starfivetech.com>
On 21/12/2022 10:08, Jia Jie Ho wrote:
> Adding StarFive TRNG controller node to VisionFive 2 SoC.
>
> Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
> Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4ac159d79d66..dd3ad19772a5 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -455,5 +455,16 @@ uart5: serial@12020000 {
> reg-shift = <2>;
> status = "disabled";
> };
> +
> + rng: rng@1600c000 {
> + compatible = "starfive,jh7110-trng";
> + reg = <0x0 0x1600C000 0x0 0x4000>;
> + clocks = <&stgcrg JH7110_STGCLK_SEC_HCLK>,
> + <&stgcrg JH7110_STGCLK_SEC_MISCAHB>;
> + clock-names = "hclk", "ahb";
> + resets = <&stgcrg JH7110_STGRST_SEC_TOP_HRESETN>;
> + interrupts = <30>;
> + status = "okay";
Drop. It's by default.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-12-21 9:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 9:08 [PATCH 0/3] hwrng: starfive - Add driver for TRNG module Jia Jie Ho
2022-12-21 9:08 ` [PATCH 1/3] dt-bindings: rng: Add StarFive " Jia Jie Ho
2022-12-21 9:47 ` Krzysztof Kozlowski
2022-12-22 8:12 ` JiaJie Ho
2022-12-21 9:08 ` [PATCH 2/3] hwrng: starfive - Add TRNG driver for StarFive SoC Jia Jie Ho
2022-12-21 9:49 ` Krzysztof Kozlowski
2022-12-22 9:35 ` JiaJie Ho
2022-12-22 9:43 ` Krzysztof Kozlowski
2022-12-22 10:29 ` JiaJie Ho
2022-12-21 9:08 ` [PATCH 3/3] riscv: dts: starfive: Add TRNG node for VisionFive 2 Jia Jie Ho
2022-12-21 9:48 ` Krzysztof Kozlowski [this message]
2022-12-22 8:11 ` JiaJie Ho
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