From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98DC7ECAAD1 for ; Wed, 31 Aug 2022 08:36:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230111AbiHaIgz (ORCPT ); Wed, 31 Aug 2022 04:36:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230464AbiHaIgy (ORCPT ); Wed, 31 Aug 2022 04:36:54 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC8BE9DF8E for ; Wed, 31 Aug 2022 01:36:51 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oTJDE-0008Cf-KV; Wed, 31 Aug 2022 10:36:40 +0200 Message-ID: Subject: Re: [PATCH v5 5/7] soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets From: Lucas Stach To: Richard Zhu , p.zabel@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de, richard.leitner@linux.dev Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Date: Wed, 31 Aug 2022 10:36:39 +0200 In-Reply-To: <1661845564-11373-6-git-send-email-hongxing.zhu@nxp.com> References: <1661845564-11373-1-git-send-email-hongxing.zhu@nxp.com> <1661845564-11373-6-git-send-email-hongxing.zhu@nxp.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Am Dienstag, dem 30.08.2022 um 15:46 +0800 schrieb Richard Zhu: > From: Lucas Stach > > Dessert the PHY reset when powering up the domain and put it back > into reset when the domain is powered down. > > Signed-off-by: Lucas Stach According to patch submission guidelines you need to add your own sign- off when integrating this patch into your series. Please add in the next revision. Regards, Lucas > --- > drivers/soc/imx/imx8mp-blk-ctrl.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c > index 4ca2ede6871b..6c939d68ba9a 100644 > --- a/drivers/soc/imx/imx8mp-blk-ctrl.c > +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c > @@ -18,6 +18,8 @@ > #define GPR_REG0 0x0 > #define PCIE_CLOCK_MODULE_EN BIT(0) > #define USB_CLOCK_MODULE_EN BIT(1) > +#define PCIE_PHY_APB_RST BIT(4) > +#define PCIE_PHY_INIT_RST BIT(5) > > struct imx8mp_blk_ctrl_domain; > > @@ -75,6 +77,10 @@ static void imx8mp_hsio_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc, > case IMX8MP_HSIOBLK_PD_PCIE: > regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); > break; > + case IMX8MP_HSIOBLK_PD_PCIE_PHY: > + regmap_set_bits(bc->regmap, GPR_REG0, > + PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST); > + break; > default: > break; > } > @@ -90,6 +96,10 @@ static void imx8mp_hsio_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc, > case IMX8MP_HSIOBLK_PD_PCIE: > regmap_clear_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); > break; > + case IMX8MP_HSIOBLK_PD_PCIE_PHY: > + regmap_clear_bits(bc->regmap, GPR_REG0, > + PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST); > + break; > default: > break; > }