* [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
[not found] <1662171184-25211-1-git-send-email-quic_krichai@quicinc.com>
@ 2022-09-03 2:13 ` Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-03 2:13 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing " Krishna chaitanya chundru
1 sibling, 1 reply; 6+ messages in thread
From: Krishna chaitanya chundru @ 2022-09-03 2:13 UTC (permalink / raw)
To: helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov,
Krishna chaitanya chundru, Andy Gross, Bjorn Andersson,
Bjorn Helgaas, Rob Herring, Krzysztof Kozlowski,
Stanimir Varbanov,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
changes since v2:
- Increase the max items of clock's in common properties.
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 0b69b12..b759465 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -53,11 +53,11 @@ properties:
# Platform constraints are described later.
clocks:
minItems: 3
- maxItems: 12
+ maxItems: 13
clock-names:
minItems: 3
- maxItems: 12
+ maxItems: 13
resets:
minItems: 1
@@ -423,8 +423,8 @@ allOf:
then:
properties:
clocks:
- minItems: 11
- maxItems: 11
+ minItems: 13
+ maxItems: 13
clock-names:
items:
- const: pipe # PIPE clock
@@ -437,6 +437,8 @@ allOf:
- const: bus_slave # Slave AXI clock
- const: slave_q2a # Slave Q2A clock
- const: tbu # PCIe TBU clock
+ - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
+ - const: aggre1 # Aggre NoC PCIe1 AXI clock
- const: ddrss_sf_tbu # PCIe SF TBU clock
resets:
maxItems: 1
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
[not found] <1662171184-25211-1-git-send-email-quic_krichai@quicinc.com>
2022-09-03 2:13 ` [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks Krishna chaitanya chundru
@ 2022-09-03 2:13 ` Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
1 sibling, 1 reply; 6+ messages in thread
From: Krishna chaitanya chundru @ 2022-09-03 2:13 UTC (permalink / raw)
To: helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov,
Krishna chaitanya chundru, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
Add missing aggre0, aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index e66fc67..a5ce095 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2043,6 +2043,8 @@
<&gcc GCC_PCIE_1_SLV_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+ <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
+ <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
<&gcc GCC_DDRSS_PCIE_SF_CLK>;
clock-names = "pipe",
@@ -2055,6 +2057,8 @@
"bus_slave",
"slave_q2a",
"tbu",
+ "aggre0",
+ "aggre1",
"ddrss_sf_tbu";
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
2022-09-03 2:13 ` [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks Krishna chaitanya chundru
@ 2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:37 ` Krishna Chaitanya Chundru
0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-07 12:22 UTC (permalink / raw)
To: Krishna chaitanya chundru, helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov, Andy Gross,
Bjorn Andersson, Bjorn Helgaas, Rob Herring, Krzysztof Kozlowski,
Stanimir Varbanov,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On 03/09/2022 04:13, Krishna chaitanya chundru wrote:
> Add missing aggre0 and aggre1 clocks.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> changes since v2:
> - Increase the max items of clock's in common properties.
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 0b69b12..b759465 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -53,11 +53,11 @@ properties:
> # Platform constraints are described later.
> clocks:
> minItems: 3
> - maxItems: 12
> + maxItems: 13
>
> clock-names:
> minItems: 3
> - maxItems: 12
> + maxItems: 13
>
> resets:
> minItems: 1
> @@ -423,8 +423,8 @@ allOf:
> then:
> properties:
> clocks:
> - minItems: 11
> - maxItems: 11
> + minItems: 13
> + maxItems: 13
> clock-names:
> items:
> - const: pipe # PIPE clock
> @@ -437,6 +437,8 @@ allOf:
> - const: bus_slave # Slave AXI clock
> - const: slave_q2a # Slave Q2A clock
> - const: tbu # PCIe TBU clock
> + - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> - const: ddrss_sf_tbu # PCIe SF TBU clock
Why adding them in the middle, not at the end of list? It does not match
other variants and affects the DTB ABI (order is strict).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
2022-09-03 2:13 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing " Krishna chaitanya chundru
@ 2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:38 ` Krishna Chaitanya Chundru
0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-07 12:22 UTC (permalink / raw)
To: Krishna chaitanya chundru, helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On 03/09/2022 04:13, Krishna chaitanya chundru wrote:
> Add missing aggre0, aggre1 clocks.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index e66fc67..a5ce095 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2043,6 +2043,8 @@
> <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
> <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
> <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
> + <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
> + <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
> <&gcc GCC_DDRSS_PCIE_SF_CLK>;
>
> clock-names = "pipe",
> @@ -2055,6 +2057,8 @@
> "bus_slave",
> "slave_q2a",
> "tbu",
> + "aggre0",
> + "aggre1",
> "ddrss_sf_tbu";
>
Same as binding - adding entries in the middle causes ABI issues.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
2022-09-07 12:22 ` Krzysztof Kozlowski
@ 2022-09-08 6:37 ` Krishna Chaitanya Chundru
0 siblings, 0 replies; 6+ messages in thread
From: Krishna Chaitanya Chundru @ 2022-09-08 6:37 UTC (permalink / raw)
To: Krzysztof Kozlowski, helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov, Andy Gross,
Bjorn Andersson, Bjorn Helgaas, Rob Herring, Krzysztof Kozlowski,
Stanimir Varbanov,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On 9/7/2022 5:52 PM, Krzysztof Kozlowski wrote:
> On 03/09/2022 04:13, Krishna chaitanya chundru wrote:
>> Add missing aggre0 and aggre1 clocks.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>> ---
>> changes since v2:
>> - Increase the max items of clock's in common properties.
>> ---
>> Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++----
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> index 0b69b12..b759465 100644
>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> @@ -53,11 +53,11 @@ properties:
>> # Platform constraints are described later.
>> clocks:
>> minItems: 3
>> - maxItems: 12
>> + maxItems: 13
>>
>> clock-names:
>> minItems: 3
>> - maxItems: 12
>> + maxItems: 13
>>
>> resets:
>> minItems: 1
>> @@ -423,8 +423,8 @@ allOf:
>> then:
>> properties:
>> clocks:
>> - minItems: 11
>> - maxItems: 11
>> + minItems: 13
>> + maxItems: 13
>> clock-names:
>> items:
>> - const: pipe # PIPE clock
>> @@ -437,6 +437,8 @@ allOf:
>> - const: bus_slave # Slave AXI clock
>> - const: slave_q2a # Slave Q2A clock
>> - const: tbu # PCIe TBU clock
>> + - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
>> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
>> - const: ddrss_sf_tbu # PCIe SF TBU clock
> Why adding them in the middle, not at the end of list? It does not match
> other variants and affects the DTB ABI (order is strict).
>
> Best regards,
> Krzysztof
Ok I will change the order as suggested.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
2022-09-07 12:22 ` Krzysztof Kozlowski
@ 2022-09-08 6:38 ` Krishna Chaitanya Chundru
0 siblings, 0 replies; 6+ messages in thread
From: Krishna Chaitanya Chundru @ 2022-09-08 6:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, helgaas
Cc: linux-pci, linux-arm-msm, linux-kernel, mka, quic_vbadigan,
quic_hemantk, quic_nitegupt, quic_skananth, quic_ramkri,
manivannan.sadhasivam, swboyd, dmitry.baryshkov, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
On 9/7/2022 5:52 PM, Krzysztof Kozlowski wrote:
> On 03/09/2022 04:13, Krishna chaitanya chundru wrote:
>> Add missing aggre0, aggre1 clocks.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index e66fc67..a5ce095 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2043,6 +2043,8 @@
>> <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
>> <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
>> <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
>> + <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
>> + <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
>> <&gcc GCC_DDRSS_PCIE_SF_CLK>;
>>
>> clock-names = "pipe",
>> @@ -2055,6 +2057,8 @@
>> "bus_slave",
>> "slave_q2a",
>> "tbu",
>> + "aggre0",
>> + "aggre1",
>> "ddrss_sf_tbu";
>>
> Same as binding - adding entries in the middle causes ABI issues.
>
> Best regards,
> Krzysztof
Ok I will change the order as suggested.
^ permalink raw reply [flat|nested] 6+ messages in thread
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[not found] <1662171184-25211-1-git-send-email-quic_krichai@quicinc.com>
2022-09-03 2:13 ` [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:37 ` Krishna Chaitanya Chundru
2022-09-03 2:13 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing " Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:38 ` Krishna Chaitanya Chundru
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