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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id m2-20020a195202000000b004a47e7b91c4sm163429lfb.195.2022.11.30.00.33.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Nov 2022 00:33:55 -0800 (PST) Message-ID: Date: Wed, 30 Nov 2022 09:33:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH 5/9] dt-bindings: spi: mtk-snfi: add mt7986 IC snfi bindings Content-Language: en-US To: =?UTF-8?B?WGlhbmdzaGVuZyBIb3UgKOS+r+elpeiDnCk=?= , "miquel.raynal@bootlin.com" , "robh+dt@kernel.org" , "broonie@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "matthias.bgg@gmail.com" , "gch981213@gmail.com" , "vigneshr@ti.com" , "richard@nod.at" Cc: "linux-kernel@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , "linux-mtd@lists.infradead.org" , "devicetree@vger.kernel.org" , =?UTF-8?B?QmVubGlhbmcgWmhhbyAo6LW15pys5LquKQ==?= , "linux-spi@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , =?UTF-8?B?QmluIFpoYW5nICjnq6Dmlowp?= References: <20221128020613.14821-1-xiangsheng.hou@mediatek.com> <20221128020613.14821-6-xiangsheng.hou@mediatek.com> <8b8e4b23-a3bc-7e3d-199a-e8f591d05d71@linaro.org> <5f76482d33933c19e191ea618f8622cd0660597f.camel@mediatek.com> <36d71d033f6926dfaefed7010bced94b4cd4b339.camel@mediatek.com> From: Krzysztof Kozlowski In-Reply-To: <36d71d033f6926dfaefed7010bced94b4cd4b339.camel@mediatek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/11/2022 09:18, Xiangsheng Hou (侯祥胜) wrote: > Hi Krzysztof, > > On Tue, 2022-11-29 at 08:47 +0100, Krzysztof Kozlowski wrote: >> On 29/11/2022 03:50, Xiangsheng Hou (侯祥胜) wrote: >>> >>>>> clocks: >>>>> + minItems: 2 >>>>> items: >>>>> - description: clock used for the controller >>>>> - description: clock used for the SPI bus >>>>> + - description: clock used for the AHB bus dma bus, this >>>>> depends on >>>>> + hardware design, so this is optional. >>>> >>>> Optional for which variants? For all of them? >>> >>> It`s only needed for the item 3 nfi_hclk. Is it proper with this >>> description or any other suggestion. >> >> I understand third clock is optional. For which variants/compatibles >> it >> is optional? Add allOf:if:then restricting it. > > The MediaTek SPI NAND controller IP used by MT7986 is the newest. > In the future, there will have other SoCs. > If add restricting on this, may not easy to maintain. > Does this acceptable? I don't think it is not easy to maintain. We have it in many, many bindings... Best regards, Krzysztof