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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id z25-20020a195059000000b004b57bbaef87sm831961lfj.224.2022.12.14.06.54.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 14 Dec 2022 06:54:40 -0800 (PST) Message-ID: Date: Wed, 14 Dec 2022 15:54:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v2 1/2] arm64: dts: Add Arm corstone500 platform support Content-Language: en-US From: Krzysztof Kozlowski To: Emekcan Aras , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org References: <20221214132404.439882-1-emekcan.aras@arm.com> <20221214132404.439882-2-emekcan.aras@arm.com> <20336c6d-6ad5-02d2-91e2-f362507040b1@linaro.org> In-Reply-To: <20336c6d-6ad5-02d2-91e2-f362507040b1@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 14/12/2022 14:41, Krzysztof Kozlowski wrote: > On 14/12/2022 14:24, Emekcan Aras wrote: >> From: Emekcan Aras >> > > Use subject prefixes matching the subsystem (git log --oneline -- ...). > You already got such comment for v1... so do not ignore it but implement > instead. > >> Corstone500[0] is a platform from arm, which includes Cortex-A cores and >> ideal starting point for feature rich System on Chip (SoC) designs >> based on the Cortex-A5 core. >> >> These device trees contains the necessary bits to support the >> Corstone 500 FVP (Fixed Virtual Platform) and the >> FPGA MPS3 board. >> >> 0: https://developer.arm.com/documentation/102262/0000 >> >> Signed-off-by: Emekcan Aras >> --- >> arch/arm/boot/dts/corstone500.dts | 181 ++++++++++++++++++++++++++++++ >> 1 file changed, 181 insertions(+) >> create mode 100644 arch/arm/boot/dts/corstone500.dts > > How do you test it? I do not see a way to compile it... > > You need to include it in maintainers entry and CC relevant maintainers. > >> >> diff --git a/arch/arm/boot/dts/corstone500.dts b/arch/arm/boot/dts/corstone500.dts >> new file mode 100644 >> index 000000000000..976aa333ffbc >> --- /dev/null >> +++ b/arch/arm/boot/dts/corstone500.dts >> @@ -0,0 +1,181 @@ >> +// SPDX-License-Identifier: GPL-2.0 or MIT >> +/* >> + * Copyright (c) 2022, Arm Limited. All rights reserved. >> + * >> + */ >> + >> + > > Just one blank line > >> +#include >> + >> +/ { >> + model = "ARM Corstone500"; >> + compatible = "arm,corstone500"; > > No DTSI? No board or platform compatible? How is it going to be used by > anyone else? I guess this is the same as concept as Corstone 1000. Best regards, Krzysztof