Re: [PATCH v3 3/4] arm64: dts: qcom: sc8280xp: camss: Add CCI definitions

[Konrad Dybcio <konrad.dybcio@linaro.org>]

On 1/11/24 12:46, Bryan O'Donoghue wrote:
> On 10/01/2024 11:03, Konrad Dybcio wrote:
>>
>>
>> On 1/9/24 17:06, Bryan O'Donoghue wrote:
>>> sc8280xp has four Camera Control Interface (CCI) blocks which pinout to
>>> two I2C master controllers for each CCI.
>>>
>>> The CCI I2C pins are not muxed so we define them in the dtsi.
>>>
>>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 307 +++++++++++++++++++++++++++++++++
>>>   1 file changed, 307 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>> index febf28356ff8..f48dfa5e5f36 100644
>>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>> @@ -3451,6 +3451,169 @@ usb_1_role_switch: endpoint {
>>>               };
>>>           };
>>> +        cci0: cci@ac4a000 {
>>> +            compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
>>> +            reg = <0 0x0ac4a000 0 0x1000>;
>>> +
>>> +            interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
>>> +
>>> +            clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
>>> +                 <&camcc CAMCC_SLOW_AHB_CLK_SRC>,
>>> +                 <&camcc CAMCC_CPAS_AHB_CLK>,
>>> +                 <&camcc CAMCC_CCI_0_CLK>;
>>> +            clock-names = "camnoc_axi",
>>> +                      "slow_ahb_src",
>>> +                      "cpas_ahb",
>>> +                      "cci";
>>> +
>>> +            power-domains = <&camcc TITAN_TOP_GDSC>;
>>> +
>>> +            pinctrl-names = "default", "sleep";
>>> +            pinctrl-0 = <&cci0_default>;
>>> +            pinctrl-1 = <&cci0_sleep>;
>>> +
>> property-names goes below property-n, just like with clocks 10 lines
>> above :/
> 
> Didn't you ask for this to be re-ordered ?

Sorry, I probably had the property ordering in mind.. that definitely
came out as confusing.

Konrad