* [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D
@ 2025-08-22 5:39 Xianwei Zhao via B4 Relay
2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay
` (5 more replies)
0 siblings, 6 replies; 11+ messages in thread
From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan,
Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel,
linux-pm, Xianwei Zhao, hongyu.chen1
Add power controller driver support for Amlogic S6 S7 S7D SoC.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
hongyu.chen1 (5):
dt-bindings: power: add Amlogic S6 S7 S7D power domains
pmdomain: amlogic: Add support for S6 S7 S7D power domains controller
arm64: dts: amlogic: s6: add power domain controller node
arm64: dts: amlogic: s7: add power domain controller node
arm64: dts: amlogic: s7d: add power domain controller node
.../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +
arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 10 +++
arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 10 +++
arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 10 +++
drivers/pmdomain/amlogic/meson-secure-pwrc.c | 95 ++++++++++++++++++++++
include/dt-bindings/power/amlogic,s6-pwrc.h | 29 +++++++
include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++
include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++
8 files changed, 204 insertions(+)
---
base-commit: ffeebf7587f518a3717fad308cf735adbbcaba97
change-id: 20250820-pm-s6-s7-s7d-950f720aac6d
Best regards,
--
Xianwei Zhao <xianwei.zhao@amlogic.com>
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 ` Xianwei Zhao via B4 Relay 2025-08-22 16:53 ` Conor Dooley 2025-09-04 11:07 ` Krzysztof Kozlowski 2025-08-22 5:39 ` [PATCH 2/5] pmdomain: amlogic: Add support for S6 S7 S7D power domains controller Xianwei Zhao via B4 Relay ` (4 subsequent siblings) 5 siblings, 2 replies; 11+ messages in thread From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, Xianwei Zhao, hongyu.chen1 From: "hongyu.chen1" <hongyu.chen1@amlogic.com> Add devicetree binding document and related header file for Amlogic S6 S7 S7D secure power domains. Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- .../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +++ include/dt-bindings/power/amlogic,s6-pwrc.h | 29 ++++++++++++++++++++++ include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++++++++++++ include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++++++++++++++++ 4 files changed, 79 insertions(+) diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index 15d74138baa3..12b71688dd34 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -24,6 +24,9 @@ properties: - amlogic,a5-pwrc - amlogic,c3-pwrc - amlogic,t7-pwrc + - amlogic,s6-pwrc + - amlogic,s7-pwrc + - amlogic,s7d-pwrc "#power-domain-cells": const: 1 diff --git a/include/dt-bindings/power/amlogic,s6-pwrc.h b/include/dt-bindings/power/amlogic,s6-pwrc.h new file mode 100644 index 000000000000..2c005864ae73 --- /dev/null +++ b/include/dt-bindings/power/amlogic,s6-pwrc.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (C) 2025 Amlogic, Inc. All rights reserved + */ +#ifndef _DT_BINDINGS_AMLOGIC_S6_POWER_H +#define _DT_BINDINGS_AMLOGIC_S6_POWER_H + +#define PWRC_S6_DSPA_ID 0 +#define PWRC_S6_DOS_HEVC_ID 1 +#define PWRC_S6_DOS_VDEC_ID 2 +#define PWRC_S6_VPU_HDMI_ID 3 +#define PWRC_S6_U2DRD_ID 4 +#define PWRC_S6_U3DRD_ID 5 +#define PWRC_S6_SD_EMMC_C_ID 6 +#define PWRC_S6_GE2D_ID 7 +#define PWRC_S6_AMFC_ID 8 +#define PWRC_S6_VC9000E_ID 9 +#define PWRC_S6_DEWARP_ID 10 +#define PWRC_S6_VICP_ID 11 +#define PWRC_S6_SD_EMMC_A_ID 12 +#define PWRC_S6_SD_EMMC_B_ID 13 +#define PWRC_S6_ETH_ID 14 +#define PWRC_S6_PCIE_ID 15 +#define PWRC_S6_NNA_4T_ID 16 +#define PWRC_S6_AUDIO_ID 17 +#define PWRC_S6_AUCPU_ID 18 +#define PWRC_S6_ADAPT_ID 19 + +#endif diff --git a/include/dt-bindings/power/amlogic,s7-pwrc.h b/include/dt-bindings/power/amlogic,s7-pwrc.h new file mode 100644 index 000000000000..3f21d095f784 --- /dev/null +++ b/include/dt-bindings/power/amlogic,s7-pwrc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (C) 2025 Amlogic, Inc. All rights reserved + */ +#ifndef _DT_BINDINGS_AMLOGIC_S7_POWER_H +#define _DT_BINDINGS_AMLOGIC_S7_POWER_H + +#define PWRC_S7_DOS_HEVC_ID 0 +#define PWRC_S7_DOS_VDEC_ID 1 +#define PWRC_S7_VPU_HDMI_ID 2 +#define PWRC_S7_USB_COMB_ID 3 +#define PWRC_S7_SD_EMMC_C_ID 4 +#define PWRC_S7_GE2D_ID 5 +#define PWRC_S7_SD_EMMC_A_ID 6 +#define PWRC_S7_SD_EMMC_B_ID 7 +#define PWRC_S7_ETH_ID 8 +#define PWRC_S7_AUCPU_ID 9 +#define PWRC_S7_AUDIO_ID 10 + +#endif diff --git a/include/dt-bindings/power/amlogic,s7d-pwrc.h b/include/dt-bindings/power/amlogic,s7d-pwrc.h new file mode 100644 index 000000000000..c6998553670a --- /dev/null +++ b/include/dt-bindings/power/amlogic,s7d-pwrc.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (C) 2025 Amlogic, Inc. All rights reserved + */ +#ifndef _DT_BINDINGS_AMLOGIC_S7D_POWER_H +#define _DT_BINDINGS_AMLOGIC_S7D_POWER_H + +#define PWRC_S7D_DOS_HCODEC_ID 0 +#define PWRC_S7D_DOS_HEVC_ID 1 +#define PWRC_S7D_DOS_VDEC_ID 2 +#define PWRC_S7D_VPU_HDMI_ID 3 +#define PWRC_S7D_USB_U2DRD_ID 4 +#define PWRC_S7D_USB_U2H_ID 5 +#define PWRC_S7D_SSD_EMMC_C_ID 6 +#define PWRC_S7D_GE2D_ID 7 +#define PWRC_S7D_AMFC_ID 8 +#define PWRC_S7D_EMMC_A_ID 9 +#define PWRC_S7D_EMMC_B_ID 10 +#define PWRC_S7D_ETH_ID 11 +#define PWRC_S7D_AUCPU_ID 12 +#define PWRC_S7D_AUDIO_ID 13 +#define PWRC_S7D_SRAMA_ID 14 +#define PWRC_S7D_DMC0_ID 15 +#define PWRC_S7D_DMC1_ID 16 +#define PWRC_S7D_DDR_ID 17 + +#endif -- 2.37.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains 2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay @ 2025-08-22 16:53 ` Conor Dooley 2025-09-04 11:07 ` Krzysztof Kozlowski 1 sibling, 0 replies; 11+ messages in thread From: Conor Dooley @ 2025-08-22 16:53 UTC (permalink / raw) To: xianwei.zhao Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson, devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, hongyu.chen1 [-- Attachment #1: Type: text/plain, Size: 54 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains 2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay 2025-08-22 16:53 ` Conor Dooley @ 2025-09-04 11:07 ` Krzysztof Kozlowski 2025-09-04 16:15 ` Ulf Hansson 1 sibling, 1 reply; 11+ messages in thread From: Krzysztof Kozlowski @ 2025-09-04 11:07 UTC (permalink / raw) To: xianwei.zhao, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, hongyu.chen1 On 22/08/2025 07:39, Xianwei Zhao via B4 Relay wrote: > From: "hongyu.chen1" <hongyu.chen1@amlogic.com> > > Add devicetree binding document and related header file for > Amlogic S6 S7 S7D secure power domains. > > Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> > --- > .../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +++ > include/dt-bindings/power/amlogic,s6-pwrc.h | 29 ++++++++++++++++++++++ > include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++++++++++++ > include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++++++++++++++++ > 4 files changed, 79 insertions(+) > > diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > index 15d74138baa3..12b71688dd34 100644 > --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > @@ -24,6 +24,9 @@ properties: > - amlogic,a5-pwrc > - amlogic,c3-pwrc > - amlogic,t7-pwrc > + - amlogic,s6-pwrc > + - amlogic,s7-pwrc > + - amlogic,s7d-pwrc If there is going to be new version: Please keep alphabetical order. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains 2025-09-04 11:07 ` Krzysztof Kozlowski @ 2025-09-04 16:15 ` Ulf Hansson 2025-09-05 2:03 ` Xianwei Zhao 0 siblings, 1 reply; 11+ messages in thread From: Ulf Hansson @ 2025-09-04 16:15 UTC (permalink / raw) To: xianwei.zhao, Krzysztof Kozlowski Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, hongyu.chen1 On Thu, 4 Sept 2025 at 13:07, Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 22/08/2025 07:39, Xianwei Zhao via B4 Relay wrote: > > From: "hongyu.chen1" <hongyu.chen1@amlogic.com> > > > > Add devicetree binding document and related header file for > > Amlogic S6 S7 S7D secure power domains. > > > > Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> > > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> > > --- > > .../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +++ > > include/dt-bindings/power/amlogic,s6-pwrc.h | 29 ++++++++++++++++++++++ > > include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++++++++++++ > > include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++++++++++++++++ > > 4 files changed, 79 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > > index 15d74138baa3..12b71688dd34 100644 > > --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > > +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > > @@ -24,6 +24,9 @@ properties: > > - amlogic,a5-pwrc > > - amlogic,c3-pwrc > > - amlogic,t7-pwrc > > + - amlogic,s6-pwrc > > + - amlogic,s7-pwrc > > + - amlogic,s7d-pwrc > > > If there is going to be new version: > Please keep alphabetical order. I have just applied this, so please send a fixup patch on-top. Kind regards Uffe ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains 2025-09-04 16:15 ` Ulf Hansson @ 2025-09-05 2:03 ` Xianwei Zhao 0 siblings, 0 replies; 11+ messages in thread From: Xianwei Zhao @ 2025-09-05 2:03 UTC (permalink / raw) To: Ulf Hansson, Krzysztof Kozlowski Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, hongyu.chen1 Hi Ulf, Thanks. On 2025/9/5 00:15, Ulf Hansson wrote: > [ EXTERNAL EMAIL ] > > On Thu, 4 Sept 2025 at 13:07, Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 22/08/2025 07:39, Xianwei Zhao via B4 Relay wrote: >>> From: "hongyu.chen1" <hongyu.chen1@amlogic.com> >>> >>> Add devicetree binding document and related header file for >>> Amlogic S6 S7 S7D secure power domains. >>> >>> Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> >>> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> >>> --- >>> .../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +++ >>> include/dt-bindings/power/amlogic,s6-pwrc.h | 29 ++++++++++++++++++++++ >>> include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++++++++++++ >>> include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++++++++++++++++ >>> 4 files changed, 79 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >>> index 15d74138baa3..12b71688dd34 100644 >>> --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >>> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >>> @@ -24,6 +24,9 @@ properties: >>> - amlogic,a5-pwrc >>> - amlogic,c3-pwrc >>> - amlogic,t7-pwrc >>> + - amlogic,s6-pwrc >>> + - amlogic,s7-pwrc >>> + - amlogic,s7d-pwrc >> >> >> If there is going to be new version: >> Please keep alphabetical order. > > I have just applied this, so please send a fixup patch on-top. > Will do. > Kind regards > Uffe ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/5] pmdomain: amlogic: Add support for S6 S7 S7D power domains controller 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 ` Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 3/5] arm64: dts: amlogic: s6: add power domain controller node Xianwei Zhao via B4 Relay ` (3 subsequent siblings) 5 siblings, 0 replies; 11+ messages in thread From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, Xianwei Zhao, hongyu.chen1 From: "hongyu.chen1" <hongyu.chen1@amlogic.com> Add support for the S6 S7 S7D power controller, whose registers are in the secure domain and should be accessed via SMC. Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- drivers/pmdomain/amlogic/meson-secure-pwrc.c | 95 ++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/pmdomain/amlogic/meson-secure-pwrc.c b/drivers/pmdomain/amlogic/meson-secure-pwrc.c index e8bda60078c4..1d2f371d2d7f 100644 --- a/drivers/pmdomain/amlogic/meson-secure-pwrc.c +++ b/drivers/pmdomain/amlogic/meson-secure-pwrc.c @@ -16,6 +16,9 @@ #include <dt-bindings/power/amlogic,t7-pwrc.h> #include <dt-bindings/power/amlogic,a4-pwrc.h> #include <dt-bindings/power/amlogic,a5-pwrc.h> +#include <dt-bindings/power/amlogic,s6-pwrc.h> +#include <dt-bindings/power/amlogic,s7-pwrc.h> +#include <dt-bindings/power/amlogic,s7d-pwrc.h> #include <linux/arm-smccc.h> #include <linux/firmware/meson/meson_sm.h> #include <linux/module.h> @@ -201,6 +204,71 @@ static const struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = { SEC_PD(S4_AUDIO, 0), }; +static const struct meson_secure_pwrc_domain_desc s6_pwrc_domains[] = { + SEC_PD(S6_DSPA, 0), + SEC_PD(S6_DOS_HEVC, 0), + SEC_PD(S6_DOS_VDEC, 0), + SEC_PD(S6_VPU_HDMI, 0), + SEC_PD(S6_U2DRD, 0), + SEC_PD(S6_U3DRD, 0), + SEC_PD(S6_SD_EMMC_C, 0), + SEC_PD(S6_GE2D, 0), + SEC_PD(S6_AMFC, 0), + SEC_PD(S6_VC9000E, 0), + SEC_PD(S6_DEWARP, 0), + SEC_PD(S6_VICP, 0), + SEC_PD(S6_SD_EMMC_A, 0), + SEC_PD(S6_SD_EMMC_B, 0), + /* ETH is for ethernet online wakeup, and should be always on */ + SEC_PD(S6_ETH, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S6_PCIE, 0), + SEC_PD(S6_NNA_4T, 0), + SEC_PD(S6_AUDIO, 0), + SEC_PD(S6_AUCPU, 0), + SEC_PD(S6_ADAPT, 0), +}; + +static const struct meson_secure_pwrc_domain_desc s7_pwrc_domains[] = { + SEC_PD(S7_DOS_HEVC, 0), + SEC_PD(S7_DOS_VDEC, 0), + SEC_PD(S7_VPU_HDMI, 0), + SEC_PD(S7_USB_COMB, 0), + SEC_PD(S7_SD_EMMC_C, 0), + SEC_PD(S7_GE2D, 0), + SEC_PD(S7_SD_EMMC_A, 0), + SEC_PD(S7_SD_EMMC_B, 0), + /* ETH is for ethernet online wakeup, and should be always on */ + SEC_PD(S7_ETH, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S7_AUCPU, 0), + SEC_PD(S7_AUDIO, 0), +}; + +static const struct meson_secure_pwrc_domain_desc s7d_pwrc_domains[] = { + SEC_PD(S7D_DOS_HCODEC, 0), + SEC_PD(S7D_DOS_HEVC, 0), + SEC_PD(S7D_DOS_VDEC, 0), + SEC_PD(S7D_VPU_HDMI, 0), + SEC_PD(S7D_USB_U2DRD, 0), + SEC_PD(S7D_USB_U2H, 0), + SEC_PD(S7D_SSD_EMMC_C, 0), + SEC_PD(S7D_GE2D, 0), + SEC_PD(S7D_AMFC, 0), + SEC_PD(S7D_EMMC_A, 0), + SEC_PD(S7D_EMMC_B, 0), + /* ETH is for ethernet online wakeup, and should be always on */ + SEC_PD(S7D_ETH, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S7D_AUCPU, 0), + SEC_PD(S7D_AUDIO, 0), + /* SRAMA is used as ATF runtime memory, and should be always on */ + SEC_PD(S7D_SRAMA, GENPD_FLAG_ALWAYS_ON), + /* DMC0 is for DDR PHY ana/dig and DMC, and should be always on */ + SEC_PD(S7D_DMC0, GENPD_FLAG_ALWAYS_ON), + /* DMC1 is for DDR PHY ana/dig and DMC, and should be always on */ + SEC_PD(S7D_DMC1, GENPD_FLAG_ALWAYS_ON), + /* DDR should be always on */ + SEC_PD(S7D_DDR, GENPD_FLAG_ALWAYS_ON), +}; + static const struct meson_secure_pwrc_domain_desc t7_pwrc_domains[] = { SEC_PD(T7_DSPA, 0), SEC_PD(T7_DSPB, 0), @@ -367,6 +435,21 @@ static const struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = { .count = ARRAY_SIZE(s4_pwrc_domains), }; +static const struct meson_secure_pwrc_domain_data amlogic_secure_s6_pwrc_data = { + .domains = s6_pwrc_domains, + .count = ARRAY_SIZE(s6_pwrc_domains), +}; + +static const struct meson_secure_pwrc_domain_data amlogic_secure_s7_pwrc_data = { + .domains = s7_pwrc_domains, + .count = ARRAY_SIZE(s7_pwrc_domains), +}; + +static const struct meson_secure_pwrc_domain_data amlogic_secure_s7d_pwrc_data = { + .domains = s7d_pwrc_domains, + .count = ARRAY_SIZE(s7d_pwrc_domains), +}; + static const struct meson_secure_pwrc_domain_data amlogic_secure_t7_pwrc_data = { .domains = t7_pwrc_domains, .count = ARRAY_SIZE(t7_pwrc_domains), @@ -393,6 +476,18 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = { .compatible = "amlogic,meson-s4-pwrc", .data = &meson_secure_s4_pwrc_data, }, + { + .compatible = "amlogic,s6-pwrc", + .data = &amlogic_secure_s6_pwrc_data, + }, + { + .compatible = "amlogic,s7-pwrc", + .data = &amlogic_secure_s7_pwrc_data, + }, + { + .compatible = "amlogic,s7d-pwrc", + .data = &amlogic_secure_s7d_pwrc_data, + }, { .compatible = "amlogic,t7-pwrc", .data = &amlogic_secure_t7_pwrc_data, -- 2.37.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/5] arm64: dts: amlogic: s6: add power domain controller node 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 2/5] pmdomain: amlogic: Add support for S6 S7 S7D power domains controller Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 ` Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 4/5] arm64: dts: amlogic: s7: " Xianwei Zhao via B4 Relay ` (2 subsequent siblings) 5 siblings, 0 replies; 11+ messages in thread From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, Xianwei Zhao, hongyu.chen1 From: "hongyu.chen1" <hongyu.chen1@amlogic.com> Add power domain controller node for Amlogic S6 SoC. Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi index 5f602f1170c0..0dca64a2ef9e 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/amlogic,pinctrl.h> +#include <dt-bindings/power/amlogic,s6-pwrc.h> / { cpus { #address-cells = <2>; @@ -41,6 +42,15 @@ cpu3: cpu@300 { }; }; + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,s6-pwrc"; + #power-domain-cells = <1>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- 2.37.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/5] arm64: dts: amlogic: s7: add power domain controller node 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay ` (2 preceding siblings ...) 2025-08-22 5:39 ` [PATCH 3/5] arm64: dts: amlogic: s6: add power domain controller node Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 ` Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 5/5] arm64: dts: amlogic: s7d: " Xianwei Zhao via B4 Relay 2025-09-04 11:05 ` [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Ulf Hansson 5 siblings, 0 replies; 11+ messages in thread From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, Xianwei Zhao, hongyu.chen1 From: "hongyu.chen1" <hongyu.chen1@amlogic.com> Add power domain controller node for Amlogic S7 SoC. Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi index 260918b37b9a..0473ca7195b9 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/amlogic,pinctrl.h> +#include <dt-bindings/power/amlogic,s7-pwrc.h> / { cpus { @@ -43,6 +44,15 @@ cpu3: cpu@300 { }; + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,s7-pwrc"; + #power-domain-cells = <1>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- 2.37.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/5] arm64: dts: amlogic: s7d: add power domain controller node 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay ` (3 preceding siblings ...) 2025-08-22 5:39 ` [PATCH 4/5] arm64: dts: amlogic: s7: " Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 ` Xianwei Zhao via B4 Relay 2025-09-04 11:05 ` [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Ulf Hansson 5 siblings, 0 replies; 11+ messages in thread From: Xianwei Zhao via B4 Relay @ 2025-08-22 5:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, Ulf Hansson Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, Xianwei Zhao, hongyu.chen1 From: "hongyu.chen1" <hongyu.chen1@amlogic.com> Add power domain controller node for Amlogic S7D SoC. Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi index c4d260d5bb58..f1c2e91ec6c5 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/amlogic,pinctrl.h> +#include <dt-bindings/power/amlogic,s7d-pwrc.h> / { cpus { @@ -43,6 +44,15 @@ cpu3: cpu@300 { }; + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,s7d-pwrc"; + #power-domain-cells = <1>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- 2.37.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay ` (4 preceding siblings ...) 2025-08-22 5:39 ` [PATCH 5/5] arm64: dts: amlogic: s7d: " Xianwei Zhao via B4 Relay @ 2025-09-04 11:05 ` Ulf Hansson 5 siblings, 0 replies; 11+ messages in thread From: Ulf Hansson @ 2025-09-04 11:05 UTC (permalink / raw) To: xianwei.zhao Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Jianxin Pan, devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, linux-pm, hongyu.chen1 On Fri, 22 Aug 2025 at 07:41, Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@kernel.org> wrote: > > Add power controller driver support for Amlogic S6 S7 S7D SoC. > > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Patch 1 and 2 applied for next, thanks! Note, the DT patch (patch1) is available on my immutable dt branch too. Kind regards Uffe > --- > hongyu.chen1 (5): > dt-bindings: power: add Amlogic S6 S7 S7D power domains > pmdomain: amlogic: Add support for S6 S7 S7D power domains controller > arm64: dts: amlogic: s6: add power domain controller node > arm64: dts: amlogic: s7: add power domain controller node > arm64: dts: amlogic: s7d: add power domain controller node > > .../bindings/power/amlogic,meson-sec-pwrc.yaml | 3 + > arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 10 +++ > arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 10 +++ > arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 10 +++ > drivers/pmdomain/amlogic/meson-secure-pwrc.c | 95 ++++++++++++++++++++++ > include/dt-bindings/power/amlogic,s6-pwrc.h | 29 +++++++ > include/dt-bindings/power/amlogic,s7-pwrc.h | 20 +++++ > include/dt-bindings/power/amlogic,s7d-pwrc.h | 27 ++++++ > 8 files changed, 204 insertions(+) > --- > base-commit: ffeebf7587f518a3717fad308cf735adbbcaba97 > change-id: 20250820-pm-s6-s7-s7d-950f720aac6d > > Best regards, > -- > Xianwei Zhao <xianwei.zhao@amlogic.com> > > ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-09-05 2:03 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-08-22 5:39 [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 1/5] dt-bindings: power: add Amlogic S6 S7 S7D power domains Xianwei Zhao via B4 Relay 2025-08-22 16:53 ` Conor Dooley 2025-09-04 11:07 ` Krzysztof Kozlowski 2025-09-04 16:15 ` Ulf Hansson 2025-09-05 2:03 ` Xianwei Zhao 2025-08-22 5:39 ` [PATCH 2/5] pmdomain: amlogic: Add support for S6 S7 S7D power domains controller Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 3/5] arm64: dts: amlogic: s6: add power domain controller node Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 4/5] arm64: dts: amlogic: s7: " Xianwei Zhao via B4 Relay 2025-08-22 5:39 ` [PATCH 5/5] arm64: dts: amlogic: s7d: " Xianwei Zhao via B4 Relay 2025-09-04 11:05 ` [PATCH 0/5] Power: Add power domain driver for S6 S7 S7D Ulf Hansson
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