From: <Conor.Dooley@microchip.com>
To: <inochiama@outlook.com>, <conor@kernel.org>
Cc: <krzysztof.kozlowski@linaro.org>, <daniel.lezcano@linaro.org>,
<tglx@linutronix.de>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<aou@eecs.berkeley.edu>, <unicorn_wang@outlook.com>,
<guoren@kernel.org>, <jszhang@kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
Date: Sat, 18 Nov 2023 00:58:07 +0000 [thread overview]
Message-ID: <cd5e88b0-db70-663a-6436-e892f589e3a3@microchip.com> (raw)
In-Reply-To: <IA1PR20MB49536A1E4C97EA62558C6CC3BBB7A@IA1PR20MB4953.namprd20.prod.outlook.com>
> Thanks for your clarification. If I understand you correctly, the binding
> should have all registers that ACLINT has. But for specific use case,
> it should only contain supported registers and omit unsupported. Please
> correct me if I misunderstood. Thanks.
Yes.
next prev parent reply other threads:[~2023-11-18 0:58 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-17 5:06 [PATCH v3 0/2] Change the sg2042 timer layout to fit aclint format Inochi Amaoto
2023-11-17 5:07 ` [PATCH v3 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs Inochi Amaoto
2023-11-17 11:10 ` Krzysztof Kozlowski
2023-11-17 12:30 ` Inochi Amaoto
2023-11-17 14:30 ` Conor Dooley
2023-11-17 23:25 ` Inochi Amaoto
2023-11-18 0:58 ` Conor.Dooley [this message]
2023-11-18 1:12 ` Inochi Amaoto
2023-11-17 5:07 ` [PATCH v3 2/2] riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format Inochi Amaoto
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