[PATCH 0/6] Add initial remoteproc support for Kaanapali SoC

[PATCH 0/6] Add initial remoteproc support for Kaanapali SoC

[Jingyi Wang]

Add initial support for remoteprocs including ADSP, CDSP and MPSS on
Qualcomm Kaanapali platform which are compatible with ealier Platforms
with minor difference. And add initial support for SoC Control Processor
(SoCCP) which is loaded by  bootloader. PAS loader will check the state
of the subsystem, and set the status "attached" if ping the subsystem
successfully.

patch 5 depend on smp2p patch series:
https://lore.kernel.org/all/20250923-smp2p-v1-0-2c045af73dac@oss.qualcomm.com/

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
Gokul krishna Krishnakumar (1):
      remoteproc: qcom: pas: Add late attach support for subsystems

Jingyi Wang (5):
      dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP
      dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP
      dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali MPSS
      dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP
      remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali

 .../remoteproc/qcom,kaanapali-soccp-pas.yaml       | 174 +++++++++++++++++++++
 .../bindings/remoteproc/qcom,sm8550-pas.yaml       |  30 +++-
 drivers/remoteproc/qcom_q6v5.c                     |  89 ++++++++++-
 drivers/remoteproc/qcom_q6v5.h                     |  14 +-
 drivers/remoteproc/qcom_q6v5_adsp.c                |   2 +-
 drivers/remoteproc/qcom_q6v5_mss.c                 |   2 +-
 drivers/remoteproc/qcom_q6v5_pas.c                 |  79 +++++++++-
 7 files changed, 384 insertions(+), 6 deletions(-)
---
base-commit: ae2d20002576d2893ecaff25db3d7ef9190ac0b6
change-id: 20250917-knp-remoteproc-4a2c41480982

Best regards,
-- 
Jingyi Wang <jingyi.wang@oss.qualcomm.com>

[PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Jingyi Wang]

Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
compatible with SM8750, which can fallback to SM8550 except for one more
interrupt ("shutdown-ack").

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index 2dd479cf4821..be9e2a0bc060 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -28,7 +28,9 @@ properties:
           - qcom,x1e80100-adsp-pas
           - qcom,x1e80100-cdsp-pas
       - items:
-          - const: qcom,sm8750-adsp-pas
+          - enum:
+              - qcom,kaanapali-adsp-pas
+              - qcom,sm8750-adsp-pas
           - const: qcom,sm8550-adsp-pas
       - items:
           - const: qcom,sm8750-cdsp-pas
@@ -95,6 +97,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,kaanapali-adsp-pas
               - qcom,sm8750-adsp-pas
     then:
       properties:
@@ -185,6 +188,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,kaanapali-adsp-pas
               - qcom,sm8550-adsp-pas
               - qcom,sm8650-adsp-pas
               - qcom,sm8750-adsp-pas

-- 
2.25.1

[PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

Add remote processor PAS loader for Kaanapali CDSP processor, compatible
with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
interrupt.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index be9e2a0bc060..031fdf36a66c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -35,6 +35,9 @@ properties:
       - items:
           - const: qcom,sm8750-cdsp-pas
           - const: qcom,sm8650-cdsp-pas
+      - items:
+          - const: qcom,kaanapali-cdsp-pas
+          - const: qcom,sm8550-cdsp-pas
 
   reg:
     maxItems: 1
@@ -107,6 +110,22 @@ allOf:
           maxItems: 6
         memory-region:
           maxItems: 2
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,kaanapali-cdsp-pas
+    then:
+      properties:
+        interrupts:
+          maxItems: 6
+        interrupt-names:
+          maxItems: 6
+        memory-region:
+          minItems: 2
+          maxItems: 2
+
   - if:
       properties:
         compatible:

-- 
2.25.1

[PATCH 3/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali MPSS

[Jingyi Wang]

Document compatible for Qualcomm Kaanapali SoC MPSS PAS which looks fully
compatible with SM8750.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index 031fdf36a66c..b0d2f0371e5e 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -38,6 +38,9 @@ properties:
       - items:
           - const: qcom,kaanapali-cdsp-pas
           - const: qcom,sm8550-cdsp-pas
+      - items:
+          - const: qcom,kaanapali-mpss-pas
+          - const: qcom,sm8750-mpss-pas
 
   reg:
     maxItems: 1
@@ -191,6 +194,7 @@ allOf:
       properties:
         compatible:
           enum:
+            - qcom,kaanapali-mpss-pas
             - qcom,sm8750-mpss-pas
     then:
       properties:
@@ -227,6 +231,7 @@ allOf:
       properties:
         compatible:
           enum:
+            - qcom,kaanapali-mpss-pas
             - qcom,sdx75-mpss-pas
             - qcom,sm8550-mpss-pas
             - qcom,sm8650-mpss-pas

-- 
2.25.1

[PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Jingyi Wang]

Document the component used to boot SoCCP on Kaanapali SoC.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 .../remoteproc/qcom,kaanapali-soccp-pas.yaml       | 174 +++++++++++++++++++++
 1 file changed, 174 insertions(+)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
new file mode 100644
index 000000000000..79f678f5f7d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service
+
+maintainers:
+  - Jingyi Wang <jingyi.wang@oss.qualcomm.com>
+
+description:
+  The SoC Control Processor (SoCCP) is small RISC-V MCU that controls USB
+  Type-C, battery charging and various other functions on Qualcomm SoCs, somewhat
+  analogous to traditional PC Embedded Controllers. This document describes
+  the Peripheral Authentication Service loads and boots firmware for SoCCP.
+
+properties:
+  compatible:
+    enum:
+      - qcom,kaanapali-soccp-pas
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Watchdog interrupt
+      - description: Fatal interrupt
+      - description: Ready interrupt
+      - description: Handover interrupt
+      - description: Stop acknowledge interrupt
+      - description: Pong interrupt
+      - description: Wake acknowledge interrupt
+
+  interrupt-names:
+    items:
+      - const: wdog
+      - const: fatal
+      - const: ready
+      - const: handover
+      - const: stop-ack
+      - const: pong
+      - const: wake-ack
+
+  clocks:
+    items:
+      - description: XO clock
+
+  clock-names:
+    items:
+      - const: xo
+
+  power-domains:
+    items:
+      - description: CX power domain
+      - description: MX power domain
+
+  power-domain-names:
+    items:
+      - const: cx
+      - const: mx
+
+  firmware-name:
+    $ref: /schemas/types.yaml#/definitions/string-array
+    items:
+      - description: Firmware name of the Hexagon core
+      - description: Firmware name of the Hexagon Devicetree
+
+  memory-region:
+    items:
+      - description: Memory region for main Firmware authentication
+      - description: Memory region for Devicetree Firmware authentication
+
+  qcom,smem-states:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description: States used by the AP to signal the Hexagon core
+    items:
+      - description: Stop the remoteproc
+      - description: wakeup the remoteproc
+      - description: make remoteproc sleep
+      - description: ping the remoteproc
+
+  qcom,smem-state-names:
+    description: The names of the state bits used for SMP2P output
+    items:
+      - const: stop
+      - const: wakeup
+      - const: sleep
+      - const: ping
+
+  glink-edge:
+    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
+    unevaluatedProperties: false
+    description: |
+      Qualcomm G-Link subnode which represents communication edge, channels
+      and devices related to the Remoteproc.
+
+required:
+  - compatible
+  - reg
+  - memory-region
+  - clocks
+  - clock-names
+  - interrupts
+  - interrupt-names
+  - qcom,smem-states
+  - qcom,smem-state-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,rpmh.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mailbox/qcom-ipcc.h>
+    #include <dt-bindings/power/qcom-rpmpd.h>
+
+    remoteproc@d00000 {
+        compatible = "qcom,kaanapali-soccp-pas";
+        reg = <0x00d00000 0x200000>;
+
+        clocks = <&rpmhcc RPMH_CXO_CLK>;
+        clock-names = "xo";
+
+        interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>,
+                              <&soccp_smp2p_in 10 IRQ_TYPE_EDGE_RISING>;
+        interrupt-names = "wdog",
+                          "fatal",
+                          "ready",
+                          "handover",
+                          "stop-ack",
+                          "pong",
+                          "wake-ack";
+
+        memory-region = <&soccp_mem>,
+                        <&soccp_dtb_mem_mem>;
+
+        firmware-name = "qcom/kaanapali/soccp.mbn",
+                        "qcom/kaanapali/soccp_dtb.mbn";
+
+        power-domains = <&rpmhpd RPMHPD_CX>,
+                        <&rpmhpd RPMHPD_MX>;
+        power-domain-names = "cx",
+                             "mx";
+
+        qcom,smem-states = <&soccp_smp2p_out 0>,
+                           <&soccp_smp2p_out 10>,
+                           <&soccp_smp2p_out 9>,
+                           <&soccp_smp2p_out 8>;
+        qcom,smem-state-names = "stop",
+                                "wakeup",
+                                "sleep",
+                                "ping";
+
+        glink-edge {
+            interrupts-extended = <&ipcc IPCC_MPROC_SOCCP
+                                         IPCC_MPROC_SIGNAL_GLINK_QMP
+                                         IRQ_TYPE_EDGE_RISING>;
+            mboxes = <&ipcc IPCC_MPROC_SOCCP
+                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+            label = "soccp";
+            qcom,remote-pid = <19>;
+
+            /* ... */
+        };
+    };

-- 
2.25.1

[PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Jingyi Wang]

From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>

Subsystems can be brought out of reset by entities such as
bootloaders. Before attaching such subsystems, it is important to
check the state of the subsystem. This patch adds support to attach
to a subsystem by ensuring that the subsystem is in a sane state by
reading SMP2P bits and pinging the subsystem.

Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
 drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
 drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
 drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
 drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
 5 files changed, 163 insertions(+), 5 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
index 4ee5e67a9f03..cba05e1d6d52 100644
--- a/drivers/remoteproc/qcom_q6v5.c
+++ b/drivers/remoteproc/qcom_q6v5.c
@@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
 	size_t len;
 	char *msg;
 
+	if (q6v5->early_boot)
+		complete(&q6v5->subsys_booted);
+
 	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
 	if (!q6v5->running) {
 		complete(&q6v5->stop_done);
@@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
 	size_t len;
 	char *msg;
 
+	if (q6v5->early_boot)
+		complete(&q6v5->subsys_booted);
+
 	if (!q6v5->running)
 		return IRQ_HANDLED;
 
@@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
 
 	complete(&q6v5->start_done);
 
+	if (q6v5->early_boot)
+		complete(&q6v5->subsys_booted);
+
 	return IRQ_HANDLED;
 }
 
@@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
 	if (q6v5->handover)
 		q6v5->handover(q6v5);
 
+	if (q6v5->early_boot)
+		complete(&q6v5->subsys_booted);
+
 	icc_set_bw(q6v5->path, 0, 0);
 
 	q6v5->handover_issued = true;
@@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
 }
 EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
 
+static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
+{
+	struct qcom_q6v5 *q6v5 = data;
+
+	complete(&q6v5->ping_done);
+
+	return IRQ_HANDLED;
+}
+
+int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
+{
+	int ret;
+	int ping_failed = 0;
+
+	reinit_completion(&q6v5->ping_done);
+
+	/* Set master kernel Ping bit */
+	ret = qcom_smem_state_update_bits(q6v5->ping_state,
+					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
+	if (ret) {
+		dev_err(q6v5->dev, "Failed to update ping bits\n");
+		return ret;
+	}
+
+	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
+	if (!ret) {
+		ping_failed = -ETIMEDOUT;
+		dev_err(q6v5->dev, "Failed to get back pong\n");
+	}
+
+	/* Clear ping bit master kernel */
+	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
+	if (ret) {
+		pr_err("Failed to clear master kernel bits\n");
+		return ret;
+	}
+
+	if (ping_failed)
+		return ping_failed;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
+
+int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
+{
+	int ret = -ENODEV;
+
+	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
+	if (IS_ERR(q6v5->ping_state)) {
+		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
+			PTR_ERR(q6v5->ping_state));
+		return ret;
+	}
+
+	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
+	if (q6v5->pong_irq < 0)
+		return q6v5->pong_irq;
+
+	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
+					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+					"q6v5 pong", q6v5);
+	if (ret)
+		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
+
+	init_completion(&q6v5->ping_done);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
+
 /**
  * qcom_q6v5_init() - initializer of the q6v5 common struct
  * @q6v5:	handle to be initialized
@@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
  */
 int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
 		   struct rproc *rproc, int crash_reason, const char *load_state,
-		   void (*handover)(struct qcom_q6v5 *q6v5))
+		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
 {
 	int ret;
 
@@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
 	q6v5->dev = &pdev->dev;
 	q6v5->crash_reason = crash_reason;
 	q6v5->handover = handover;
+	q6v5->early_boot = early_boot;
 
 	init_completion(&q6v5->start_done);
 	init_completion(&q6v5->stop_done);
 
+	if (early_boot)
+		init_completion(&q6v5->subsys_booted);
+
 	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
 	if (q6v5->wdog_irq < 0)
 		return q6v5->wdog_irq;
diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
index 5a859c41896e..8a227bf70d7e 100644
--- a/drivers/remoteproc/qcom_q6v5.h
+++ b/drivers/remoteproc/qcom_q6v5.h
@@ -12,27 +12,35 @@ struct rproc;
 struct qcom_smem_state;
 struct qcom_sysmon;
 
+#define PING_TIMEOUT 500 /* in milliseconds */
+#define PING_TEST_WAIT 500 /* in milliseconds */
+
 struct qcom_q6v5 {
 	struct device *dev;
 	struct rproc *rproc;
 
 	struct qcom_smem_state *state;
+	struct qcom_smem_state *ping_state;
 	struct qmp *qmp;
 
 	struct icc_path *path;
 
 	unsigned stop_bit;
+	unsigned int ping_bit;
 
 	int wdog_irq;
 	int fatal_irq;
 	int ready_irq;
 	int handover_irq;
 	int stop_irq;
+	int pong_irq;
 
 	bool handover_issued;
 
 	struct completion start_done;
 	struct completion stop_done;
+	struct completion subsys_booted;
+	struct completion ping_done;
 
 	int crash_reason;
 
@@ -40,11 +48,13 @@ struct qcom_q6v5 {
 
 	const char *load_state;
 	void (*handover)(struct qcom_q6v5 *q6v5);
+
+	bool early_boot;
 };
 
 int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
 		   struct rproc *rproc, int crash_reason, const char *load_state,
-		   void (*handover)(struct qcom_q6v5 *q6v5));
+		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
 void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
 
 int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
@@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
 int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
 int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
 unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
+int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
+int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
 
 #endif
diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
index e98b7e03162c..1576b435b921 100644
--- a/drivers/remoteproc/qcom_q6v5_adsp.c
+++ b/drivers/remoteproc/qcom_q6v5_adsp.c
@@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
 		goto disable_pm;
 
 	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
-			     desc->load_state, qcom_adsp_pil_handover);
+			     desc->load_state, false, qcom_adsp_pil_handover);
 	if (ret)
 		goto disable_pm;
 
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 0c0199fb0e68..04e577541c8f 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
 	qproc->has_mba_logs = desc->has_mba_logs;
 
 	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
-			     qcom_msa_handover);
+			     false, qcom_msa_handover);
 	if (ret)
 		goto detach_proxy_pds;
 
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 55a7da801183..99163e48a76a 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -35,6 +35,8 @@
 
 #define MAX_ASSIGN_COUNT 3
 
+#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
+
 struct qcom_pas_data {
 	int crash_reason_smem;
 	const char *firmware_name;
@@ -58,6 +60,7 @@ struct qcom_pas_data {
 	int region_assign_count;
 	bool region_assign_shared;
 	int region_assign_vmid;
+	bool early_boot;
 };
 
 struct qcom_pas {
@@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
 	return qcom_q6v5_panic(&pas->q6v5);
 }
 
+static int qcom_pas_attach(struct rproc *rproc)
+{
+	int ret;
+	struct qcom_pas *adsp = rproc->priv;
+	bool ready_state;
+	bool crash_state;
+
+	if (!adsp->q6v5.early_boot)
+		return -EINVAL;
+
+	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
+				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
+
+	if (crash_state) {
+		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
+		adsp->rproc->state = RPROC_CRASHED;
+		return -EINVAL;
+	}
+
+	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
+				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
+
+	if (ready_state) {
+		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
+		adsp->rproc->state = RPROC_DETACHED;
+	} else {
+		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
+						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
+		if (!ret) {
+			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
+			return -ETIMEDOUT;
+		}
+	}
+
+	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
+	if (ret) {
+		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
+		rproc->state = RPROC_CRASHED;
+		return ret;
+	}
+
+	adsp->q6v5.running = true;
+	return ret;
+}
+
 static const struct rproc_ops qcom_pas_ops = {
 	.unprepare = qcom_pas_unprepare,
 	.start = qcom_pas_start,
@@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
 	.parse_fw = qcom_register_dump_segments,
 	.load = qcom_pas_load,
 	.panic = qcom_pas_panic,
+	.attach = qcom_pas_attach,
 };
 
 static const struct rproc_ops qcom_pas_minidump_ops = {
@@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
 	pas->proxy_pd_count = ret;
 
 	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
-			     desc->load_state, qcom_pas_handover);
+			     desc->load_state, desc->early_boot, qcom_pas_handover);
 	if (ret)
 		goto detach_proxy_pds;
 
@@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
 	}
 
 	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
+
+	if (pas->q6v5.early_boot) {
+		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
+		if (ret)
+			dev_err(&pdev->dev,
+				"Unable to find ping/pong bits, falling back to firmware load\n");
+		else
+			pas->rproc->state = RPROC_DETACHED;
+	}
+
 	ret = rproc_add(rproc);
 	if (ret)
 		goto remove_ssr_sysmon;

-- 
2.25.1

[PATCH 6/6] remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali

[Jingyi Wang]

The SoC Control Processor (SoCCP) is small RISC-V MCU that controls
USB Type-C, battery charging and various other functions on Qualcomm SoCs.
It provides a solution for control-plane processing, reducing per-subsystem
microcontroller reinvention. Add support for SoCCP PAS loader on Kaanapali
platform.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 drivers/remoteproc/qcom_q6v5_pas.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 99163e48a76a..5007e1706699 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -1487,7 +1487,25 @@ static const struct qcom_pas_data sm8750_mpss_resource = {
 	.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
 };
 
+static const struct qcom_pas_data kaanapali_soccp_resource = {
+	.crash_reason_smem = 656,
+	.firmware_name = "soccp.mdt",
+	.dtb_firmware_name = "soccp_dtb.mdt",
+	.pas_id = 51,
+	.dtb_pas_id = 0x41,
+	.proxy_pd_names = (char*[]){
+		"cx",
+		"mx",
+		NULL
+	},
+	.ssr_name = "soccp",
+	.sysmon_name = "soccp",
+	.auto_boot = true,
+	.early_boot = true,
+};
+
 static const struct of_device_id qcom_pas_of_match[] = {
+	{ .compatible = "qcom,kaanapali-soccp-pas", .data = &kaanapali_soccp_resource},
 	{ .compatible = "qcom,msm8226-adsp-pil", .data = &msm8996_adsp_resource},
 	{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
 	{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},

-- 
2.25.1

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Krzysztof Kozłowski]

On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>
> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
> interrupt.
>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> index be9e2a0bc060..031fdf36a66c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> @@ -35,6 +35,9 @@ properties:
>        - items:
>            - const: qcom,sm8750-cdsp-pas
>            - const: qcom,sm8650-cdsp-pas
> +      - items:
> +          - const: qcom,kaanapali-cdsp-pas
> +          - const: qcom,sm8550-cdsp-pas


This time maybe without HTML:

This looks wrong. This is not compatible with SM8550.

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Dmitry Baryshkov]

On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
> compatible with SM8750, which can fallback to SM8550 except for one more
> interrupt ("shutdown-ack").
> 
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> index 2dd479cf4821..be9e2a0bc060 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> @@ -28,7 +28,9 @@ properties:
>            - qcom,x1e80100-adsp-pas
>            - qcom,x1e80100-cdsp-pas
>        - items:
> -          - const: qcom,sm8750-adsp-pas
> +          - enum:
> +              - qcom,kaanapali-adsp-pas
> +              - qcom,sm8750-adsp-pas
>            - const: qcom,sm8550-adsp-pas
>        - items:
>            - const: qcom,sm8750-cdsp-pas
> @@ -95,6 +97,7 @@ allOf:
>          compatible:
>            contains:
>              enum:
> +              - qcom,kaanapali-adsp-pas

This one and the next entry are redundant. Do you see why?

>                - qcom,sm8750-adsp-pas
>      then:
>        properties:
> @@ -185,6 +188,7 @@ allOf:
>          compatible:
>            contains:
>              enum:
> +              - qcom,kaanapali-adsp-pas
>                - qcom,sm8550-adsp-pas
>                - qcom,sm8650-adsp-pas
>                - qcom,sm8750-adsp-pas
> 
> -- 
> 2.25.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Dmitry Baryshkov]

On Wed, Sep 24, 2025 at 04:37:26PM -0700, Jingyi Wang wrote:
> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> 
> Subsystems can be brought out of reset by entities such as
> bootloaders. Before attaching such subsystems, it is important to
> check the state of the subsystem. This patch adds support to attach
> to a subsystem by ensuring that the subsystem is in a sane state by
> reading SMP2P bits and pinging the subsystem.
> 
> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
>  drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
>  drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
>  drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
>  drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
>  5 files changed, 163 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
> index 4ee5e67a9f03..cba05e1d6d52 100644
> --- a/drivers/remoteproc/qcom_q6v5.c
> +++ b/drivers/remoteproc/qcom_q6v5.c
> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
>  	size_t len;
>  	char *msg;
>  
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);

Where do we clean this flag? I think you current code breaks restarting
of ADSP. Once the ADSP is brought up, the flag should be cleared and
further handling of the ADSP should follow the normal flow.

> +
>  	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
>  	if (!q6v5->running) {
>  		complete(&q6v5->stop_done);
> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
>  	size_t len;
>  	char *msg;
>  
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>  	if (!q6v5->running)
>  		return IRQ_HANDLED;
>  
> @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
>  
>  	complete(&q6v5->start_done);
>  
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>  	return IRQ_HANDLED;
>  }
>  
> @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
>  	if (q6v5->handover)
>  		q6v5->handover(q6v5);
>  
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>  	icc_set_bw(q6v5->path, 0, 0);
>  
>  	q6v5->handover_issued = true;
> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
>  }
>  EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>  
> +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
> +{
> +	struct qcom_q6v5 *q6v5 = data;
> +
> +	complete(&q6v5->ping_done);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
> +{
> +	int ret;
> +	int ping_failed = 0;
> +
> +	reinit_completion(&q6v5->ping_done);
> +
> +	/* Set master kernel Ping bit */
> +	ret = qcom_smem_state_update_bits(q6v5->ping_state,
> +					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
> +	if (ret) {
> +		dev_err(q6v5->dev, "Failed to update ping bits\n");
> +		return ret;
> +	}
> +
> +	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
> +	if (!ret) {
> +		ping_failed = -ETIMEDOUT;
> +		dev_err(q6v5->dev, "Failed to get back pong\n");
> +	}
> +
> +	/* Clear ping bit master kernel */
> +	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
> +	if (ret) {
> +		pr_err("Failed to clear master kernel bits\n");
> +		return ret;
> +	}
> +
> +	if (ping_failed)
> +		return ping_failed;
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
> +
> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
> +{
> +	int ret = -ENODEV;
> +
> +	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
> +	if (IS_ERR(q6v5->ping_state)) {
> +		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
> +			PTR_ERR(q6v5->ping_state));
> +		return ret;
> +	}
> +
> +	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
> +	if (q6v5->pong_irq < 0)
> +		return q6v5->pong_irq;
> +
> +	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
> +					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
> +					"q6v5 pong", q6v5);
> +	if (ret)
> +		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
> +
> +	init_completion(&q6v5->ping_done);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
> +
>  /**
>   * qcom_q6v5_init() - initializer of the q6v5 common struct
>   * @q6v5:	handle to be initialized
> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>   */
>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>  		   struct rproc *rproc, int crash_reason, const char *load_state,
> -		   void (*handover)(struct qcom_q6v5 *q6v5))
> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
>  {
>  	int ret;
>  
> @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>  	q6v5->dev = &pdev->dev;
>  	q6v5->crash_reason = crash_reason;
>  	q6v5->handover = handover;
> +	q6v5->early_boot = early_boot;
>  
>  	init_completion(&q6v5->start_done);
>  	init_completion(&q6v5->stop_done);
>  
> +	if (early_boot)
> +		init_completion(&q6v5->subsys_booted);
> +
>  	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
>  	if (q6v5->wdog_irq < 0)
>  		return q6v5->wdog_irq;
> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
> index 5a859c41896e..8a227bf70d7e 100644
> --- a/drivers/remoteproc/qcom_q6v5.h
> +++ b/drivers/remoteproc/qcom_q6v5.h
> @@ -12,27 +12,35 @@ struct rproc;
>  struct qcom_smem_state;
>  struct qcom_sysmon;
>  
> +#define PING_TIMEOUT 500 /* in milliseconds */
> +#define PING_TEST_WAIT 500 /* in milliseconds */
> +
>  struct qcom_q6v5 {
>  	struct device *dev;
>  	struct rproc *rproc;
>  
>  	struct qcom_smem_state *state;
> +	struct qcom_smem_state *ping_state;
>  	struct qmp *qmp;
>  
>  	struct icc_path *path;
>  
>  	unsigned stop_bit;
> +	unsigned int ping_bit;
>  
>  	int wdog_irq;
>  	int fatal_irq;
>  	int ready_irq;
>  	int handover_irq;
>  	int stop_irq;
> +	int pong_irq;
>  
>  	bool handover_issued;
>  
>  	struct completion start_done;
>  	struct completion stop_done;
> +	struct completion subsys_booted;
> +	struct completion ping_done;
>  
>  	int crash_reason;
>  
> @@ -40,11 +48,13 @@ struct qcom_q6v5 {
>  
>  	const char *load_state;
>  	void (*handover)(struct qcom_q6v5 *q6v5);
> +
> +	bool early_boot;
>  };
>  
>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>  		   struct rproc *rproc, int crash_reason, const char *load_state,
> -		   void (*handover)(struct qcom_q6v5 *q6v5));
> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
>  void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
>  
>  int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
>  int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
>  int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
>  unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
>  
>  #endif
> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
> index e98b7e03162c..1576b435b921 100644
> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
>  		goto disable_pm;
>  
>  	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
> -			     desc->load_state, qcom_adsp_pil_handover);
> +			     desc->load_state, false, qcom_adsp_pil_handover);
>  	if (ret)
>  		goto disable_pm;
>  
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 0c0199fb0e68..04e577541c8f 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
>  	qproc->has_mba_logs = desc->has_mba_logs;
>  
>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
> -			     qcom_msa_handover);
> +			     false, qcom_msa_handover);
>  	if (ret)
>  		goto detach_proxy_pds;
>  
> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> index 55a7da801183..99163e48a76a 100644
> --- a/drivers/remoteproc/qcom_q6v5_pas.c
> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> @@ -35,6 +35,8 @@
>  
>  #define MAX_ASSIGN_COUNT 3
>  
> +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
> +
>  struct qcom_pas_data {
>  	int crash_reason_smem;
>  	const char *firmware_name;
> @@ -58,6 +60,7 @@ struct qcom_pas_data {
>  	int region_assign_count;
>  	bool region_assign_shared;
>  	int region_assign_vmid;
> +	bool early_boot;
>  };
>  
>  struct qcom_pas {
> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
>  	return qcom_q6v5_panic(&pas->q6v5);
>  }
>  
> +static int qcom_pas_attach(struct rproc *rproc)
> +{
> +	int ret;
> +	struct qcom_pas *adsp = rproc->priv;
> +	bool ready_state;
> +	bool crash_state;
> +
> +	if (!adsp->q6v5.early_boot)
> +		return -EINVAL;
> +
> +	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
> +				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
> +
> +	if (crash_state) {
> +		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
> +		adsp->rproc->state = RPROC_CRASHED;
> +		return -EINVAL;
> +	}
> +
> +	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
> +				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
> +
> +	if (ready_state) {
> +		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
> +		adsp->rproc->state = RPROC_DETACHED;
> +	} else {
> +		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
> +						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
> +		if (!ret) {
> +			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
> +			return -ETIMEDOUT;
> +		}
> +	}
> +
> +	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
> +	if (ret) {
> +		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
> +		rproc->state = RPROC_CRASHED;
> +		return ret;
> +	}
> +
> +	adsp->q6v5.running = true;
> +	return ret;
> +}
> +
>  static const struct rproc_ops qcom_pas_ops = {
>  	.unprepare = qcom_pas_unprepare,
>  	.start = qcom_pas_start,
> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
>  	.parse_fw = qcom_register_dump_segments,
>  	.load = qcom_pas_load,
>  	.panic = qcom_pas_panic,
> +	.attach = qcom_pas_attach,
>  };
>  
>  static const struct rproc_ops qcom_pas_minidump_ops = {
> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
>  	pas->proxy_pd_count = ret;
>  
>  	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
> -			     desc->load_state, qcom_pas_handover);
> +			     desc->load_state, desc->early_boot, qcom_pas_handover);
>  	if (ret)
>  		goto detach_proxy_pds;
>  
> @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
>  	}
>  
>  	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
> +
> +	if (pas->q6v5.early_boot) {
> +		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
> +		if (ret)
> +			dev_err(&pdev->dev,
> +				"Unable to find ping/pong bits, falling back to firmware load\n");
> +		else
> +			pas->rproc->state = RPROC_DETACHED;
> +	}
> +
>  	ret = rproc_add(rproc);
>  	if (ret)
>  		goto remove_ssr_sysmon;
> 
> -- 
> 2.25.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Zhongqiu Han]

On 9/25/2025 7:37 AM, Jingyi Wang wrote:
> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> 
> Subsystems can be brought out of reset by entities such as
> bootloaders. Before attaching such subsystems, it is important to
> check the state of the subsystem. This patch adds support to attach
> to a subsystem by ensuring that the subsystem is in a sane state by
> reading SMP2P bits and pinging the subsystem.
> 
> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>   drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
>   drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
>   drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
>   drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
>   drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
>   5 files changed, 163 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
> index 4ee5e67a9f03..cba05e1d6d52 100644
> --- a/drivers/remoteproc/qcom_q6v5.c
> +++ b/drivers/remoteproc/qcom_q6v5.c
> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
>   	size_t len;
>   	char *msg;
>   
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>   	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
>   	if (!q6v5->running) {
>   		complete(&q6v5->stop_done);
> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
>   	size_t len;
>   	char *msg;
>   
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>   	if (!q6v5->running)
>   		return IRQ_HANDLED;
>   
> @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
>   
>   	complete(&q6v5->start_done);
>   
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>   	return IRQ_HANDLED;
>   }
>   
> @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
>   	if (q6v5->handover)
>   		q6v5->handover(q6v5);
>   
> +	if (q6v5->early_boot)
> +		complete(&q6v5->subsys_booted);
> +
>   	icc_set_bw(q6v5->path, 0, 0);
>   
>   	q6v5->handover_issued = true;
> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
>   }
>   EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>   
> +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
> +{
> +	struct qcom_q6v5 *q6v5 = data;
> +
> +	complete(&q6v5->ping_done);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
> +{
> +	int ret;
> +	int ping_failed = 0;
> +
> +	reinit_completion(&q6v5->ping_done);
> +
> +	/* Set master kernel Ping bit */
> +	ret = qcom_smem_state_update_bits(q6v5->ping_state,
> +					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
> +	if (ret) {
> +		dev_err(q6v5->dev, "Failed to update ping bits\n");
> +		return ret;
> +	}
> +
> +	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
> +	if (!ret) {
> +		ping_failed = -ETIMEDOUT;
> +		dev_err(q6v5->dev, "Failed to get back pong\n");
> +	}
> +
> +	/* Clear ping bit master kernel */
> +	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
> +	if (ret) {
> +		pr_err("Failed to clear master kernel bits\n");
> +		return ret;
> +	}
> +
> +	if (ping_failed)
> +		return ping_failed;
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
> +
> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
> +{
> +	int ret = -ENODEV;
> +
> +	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
> +	if (IS_ERR(q6v5->ping_state)) {
> +		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
> +			PTR_ERR(q6v5->ping_state));
> +		return ret;
> +	}
> +
> +	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
> +	if (q6v5->pong_irq < 0)
> +		return q6v5->pong_irq;
> +
> +	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
> +					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
> +					"q6v5 pong", q6v5);
> +	if (ret)
> +		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
> +
> +	init_completion(&q6v5->ping_done);

Hello Jingyi,

Since no IRQF_NO_AUTOEN flag is passed to devm_request_threaded_irq(),
the IRQ may be enabled immediately after registration.
If the thread_fn q6v5_pong_interrupt runs before
init_completion(&q6v5->ping_done) is called, it may lead to accessing an
uninitialized completion structure ?


> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
> +
>   /**
>    * qcom_q6v5_init() - initializer of the q6v5 common struct
>    * @q6v5:	handle to be initialized
> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>    */
>   int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>   		   struct rproc *rproc, int crash_reason, const char *load_state,
> -		   void (*handover)(struct qcom_q6v5 *q6v5))
> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
>   {
>   	int ret;
>   
> @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>   	q6v5->dev = &pdev->dev;
>   	q6v5->crash_reason = crash_reason;
>   	q6v5->handover = handover;
> +	q6v5->early_boot = early_boot;
>   
>   	init_completion(&q6v5->start_done);
>   	init_completion(&q6v5->stop_done);
>   
> +	if (early_boot)
> +		init_completion(&q6v5->subsys_booted);
> +
>   	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
>   	if (q6v5->wdog_irq < 0)
>   		return q6v5->wdog_irq;
> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
> index 5a859c41896e..8a227bf70d7e 100644
> --- a/drivers/remoteproc/qcom_q6v5.h
> +++ b/drivers/remoteproc/qcom_q6v5.h
> @@ -12,27 +12,35 @@ struct rproc;
>   struct qcom_smem_state;
>   struct qcom_sysmon;
>   
> +#define PING_TIMEOUT 500 /* in milliseconds */
> +#define PING_TEST_WAIT 500 /* in milliseconds */
> +
>   struct qcom_q6v5 {
>   	struct device *dev;
>   	struct rproc *rproc;
>   
>   	struct qcom_smem_state *state;
> +	struct qcom_smem_state *ping_state;
>   	struct qmp *qmp;
>   
>   	struct icc_path *path;
>   
>   	unsigned stop_bit;
> +	unsigned int ping_bit;
>   
>   	int wdog_irq;
>   	int fatal_irq;
>   	int ready_irq;
>   	int handover_irq;
>   	int stop_irq;
> +	int pong_irq;
>   
>   	bool handover_issued;
>   
>   	struct completion start_done;
>   	struct completion stop_done;
> +	struct completion subsys_booted;
> +	struct completion ping_done;
>   
>   	int crash_reason;
>   
> @@ -40,11 +48,13 @@ struct qcom_q6v5 {
>   
>   	const char *load_state;
>   	void (*handover)(struct qcom_q6v5 *q6v5);
> +
> +	bool early_boot;
>   };
>   
>   int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>   		   struct rproc *rproc, int crash_reason, const char *load_state,
> -		   void (*handover)(struct qcom_q6v5 *q6v5));
> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
>   void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
>   
>   int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
>   int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
>   int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
>   unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
>   
>   #endif
> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
> index e98b7e03162c..1576b435b921 100644
> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
>   		goto disable_pm;
>   
>   	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
> -			     desc->load_state, qcom_adsp_pil_handover);
> +			     desc->load_state, false, qcom_adsp_pil_handover);
>   	if (ret)
>   		goto disable_pm;
>   
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 0c0199fb0e68..04e577541c8f 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
>   	qproc->has_mba_logs = desc->has_mba_logs;
>   
>   	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
> -			     qcom_msa_handover);
> +			     false, qcom_msa_handover);
>   	if (ret)
>   		goto detach_proxy_pds;
>   
> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> index 55a7da801183..99163e48a76a 100644
> --- a/drivers/remoteproc/qcom_q6v5_pas.c
> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> @@ -35,6 +35,8 @@
>   
>   #define MAX_ASSIGN_COUNT 3
>   
> +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
> +
>   struct qcom_pas_data {
>   	int crash_reason_smem;
>   	const char *firmware_name;
> @@ -58,6 +60,7 @@ struct qcom_pas_data {
>   	int region_assign_count;
>   	bool region_assign_shared;
>   	int region_assign_vmid;
> +	bool early_boot;
>   };
>   
>   struct qcom_pas {
> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
>   	return qcom_q6v5_panic(&pas->q6v5);
>   }
>   
> +static int qcom_pas_attach(struct rproc *rproc)
> +{
> +	int ret;
> +	struct qcom_pas *adsp = rproc->priv;
> +	bool ready_state;
> +	bool crash_state;
> +
> +	if (!adsp->q6v5.early_boot)
> +		return -EINVAL;
> +
> +	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
> +				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
> +
> +	if (crash_state) {
> +		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
> +		adsp->rproc->state = RPROC_CRASHED;
> +		return -EINVAL;
> +	}
> +
> +	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
> +				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
> +
> +	if (ready_state) {
> +		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
> +		adsp->rproc->state = RPROC_DETACHED;
> +	} else {
> +		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
> +						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
> +		if (!ret) {
> +			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
> +			return -ETIMEDOUT;
> +		}
> +	}
> +
> +	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
> +	if (ret) {
> +		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
> +		rproc->state = RPROC_CRASHED;
> +		return ret;
> +	}
> +
> +	adsp->q6v5.running = true;
> +	return ret;
> +}
> +
>   static const struct rproc_ops qcom_pas_ops = {
>   	.unprepare = qcom_pas_unprepare,
>   	.start = qcom_pas_start,
> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
>   	.parse_fw = qcom_register_dump_segments,
>   	.load = qcom_pas_load,
>   	.panic = qcom_pas_panic,
> +	.attach = qcom_pas_attach,
>   };
>   
>   static const struct rproc_ops qcom_pas_minidump_ops = {
> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
>   	pas->proxy_pd_count = ret;
>   
>   	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
> -			     desc->load_state, qcom_pas_handover);
> +			     desc->load_state, desc->early_boot, qcom_pas_handover);
>   	if (ret)
>   		goto detach_proxy_pds;
>   
> @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
>   	}
>   
>   	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
> +
> +	if (pas->q6v5.early_boot) {
> +		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
> +		if (ret)
> +			dev_err(&pdev->dev,
> +				"Unable to find ping/pong bits, falling back to firmware load\n");
> +		else
> +			pas->rproc->state = RPROC_DETACHED;
> +	}
> +
>   	ret = rproc_add(rproc);
>   	if (ret)
>   		goto remove_ssr_sysmon;
> 


-- 
Thx and BRs,
Zhongqiu Han

Re: [PATCH 6/6] remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali

[Konrad Dybcio]

On 9/25/25 1:37 AM, Jingyi Wang wrote:
> The SoC Control Processor (SoCCP) is small RISC-V MCU that controls
> USB Type-C, battery charging and various other functions on Qualcomm SoCs.
> It provides a solution for control-plane processing, reducing per-subsystem
> microcontroller reinvention. Add support for SoCCP PAS loader on Kaanapali
> platform.
> 
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  drivers/remoteproc/qcom_q6v5_pas.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> index 99163e48a76a..5007e1706699 100644
> --- a/drivers/remoteproc/qcom_q6v5_pas.c
> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> @@ -1487,7 +1487,25 @@ static const struct qcom_pas_data sm8750_mpss_resource = {
>  	.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
>  };
>  
> +static const struct qcom_pas_data kaanapali_soccp_resource = {
> +	.crash_reason_smem = 656,
> +	.firmware_name = "soccp.mdt",
> +	.dtb_firmware_name = "soccp_dtb.mdt",

.mbn?

Konrad

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Jingyi Wang]

On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
>> compatible with SM8750, which can fallback to SM8550 except for one more
>> interrupt ("shutdown-ack").
>>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> index 2dd479cf4821..be9e2a0bc060 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> @@ -28,7 +28,9 @@ properties:
>>            - qcom,x1e80100-adsp-pas
>>            - qcom,x1e80100-cdsp-pas
>>        - items:
>> -          - const: qcom,sm8750-adsp-pas
>> +          - enum:
>> +              - qcom,kaanapali-adsp-pas
>> +              - qcom,sm8750-adsp-pas
>>            - const: qcom,sm8550-adsp-pas
>>        - items:
>>            - const: qcom,sm8750-cdsp-pas
>> @@ -95,6 +97,7 @@ allOf:
>>          compatible:
>>            contains:
>>              enum:
>> +              - qcom,kaanapali-adsp-pas
> 
> This one and the next entry are redundant. Do you see why?
> 

This one describe the interrupt:

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,kaanapali-adsp-pas
              - qcom,sm8750-adsp-pas
    then:
      properties:
        interrupts:
          maxItems: 6
        interrupt-names:
          maxItems: 6
        memory-region:
          maxItems: 2


>>                - qcom,sm8750-adsp-pas
>>      then:
>>        properties:
>> @@ -185,6 +188,7 @@ allOf:
>>          compatible:
>>            contains:
>>              enum:
>> +              - qcom,kaanapali-adsp-pas

This one describe the power domain

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,kaanapali-adsp-pas
              - qcom,sm8550-adsp-pas
              - qcom,sm8650-adsp-pas
              - qcom,sm8750-adsp-pas
              - qcom,x1e80100-adsp-pas
    then:
      properties:
        power-domains:
          items:
            - description: LCX power domain
            - description: LMX power domain
        power-domain-names:
          items:
            - const: lcx
            - const: lmx


>>                - qcom,sm8550-adsp-pas
>>                - qcom,sm8650-adsp-pas
>>                - qcom,sm8750-adsp-pas
>>
>> -- 
>> 2.25.1
>>
> 

Thanks,
Jingyi

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>
>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>> interrupt.
>>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> index be9e2a0bc060..031fdf36a66c 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>> @@ -35,6 +35,9 @@ properties:
>>        - items:
>>            - const: qcom,sm8750-cdsp-pas
>>            - const: qcom,sm8650-cdsp-pas
>> +      - items:
>> +          - const: qcom,kaanapali-cdsp-pas
>> +          - const: qcom,sm8550-cdsp-pas
> 
> 
> This time maybe without HTML:
> 
> This looks wrong. This is not compatible with SM8550.

Could you point out what is the difference from your perspecetive?
it is the same as SM8550 except for there is one more interrupt,
which is also described in this patch.

Thanks,
Jingyi

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Jingyi Wang]

On 9/25/2025 1:56 PM, Zhongqiu Han wrote:
> On 9/25/2025 7:37 AM, Jingyi Wang wrote:
>> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>>
>> Subsystems can be brought out of reset by entities such as
>> bootloaders. Before attaching such subsystems, it is important to
>> check the state of the subsystem. This patch adds support to attach
>> to a subsystem by ensuring that the subsystem is in a sane state by
>> reading SMP2P bits and pinging the subsystem.
>>
>> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>   drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
>>   drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
>>   drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
>>   drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
>>   drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
>>   5 files changed, 163 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
>> index 4ee5e67a9f03..cba05e1d6d52 100644
>> --- a/drivers/remoteproc/qcom_q6v5.c
>> +++ b/drivers/remoteproc/qcom_q6v5.c
>> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
>>       size_t len;
>>       char *msg;
>>   +    if (q6v5->early_boot)
>> +        complete(&q6v5->subsys_booted);
>> +
>>       /* Sometimes the stop triggers a watchdog rather than a stop-ack */
>>       if (!q6v5->running) {
>>           complete(&q6v5->stop_done);
>> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
>>       size_t len;
>>       char *msg;
>>   +    if (q6v5->early_boot)
>> +        complete(&q6v5->subsys_booted);
>> +
>>       if (!q6v5->running)
>>           return IRQ_HANDLED;
>>   @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
>>         complete(&q6v5->start_done);
>>   +    if (q6v5->early_boot)
>> +        complete(&q6v5->subsys_booted);
>> +
>>       return IRQ_HANDLED;
>>   }
>>   @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
>>       if (q6v5->handover)
>>           q6v5->handover(q6v5);
>>   +    if (q6v5->early_boot)
>> +        complete(&q6v5->subsys_booted);
>> +
>>       icc_set_bw(q6v5->path, 0, 0);
>>         q6v5->handover_issued = true;
>> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
>>   }
>>   EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>   +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
>> +{
>> +    struct qcom_q6v5 *q6v5 = data;
>> +
>> +    complete(&q6v5->ping_done);
>> +
>> +    return IRQ_HANDLED;
>> +}
>> +
>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
>> +{
>> +    int ret;
>> +    int ping_failed = 0;
>> +
>> +    reinit_completion(&q6v5->ping_done);
>> +
>> +    /* Set master kernel Ping bit */
>> +    ret = qcom_smem_state_update_bits(q6v5->ping_state,
>> +                      BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
>> +    if (ret) {
>> +        dev_err(q6v5->dev, "Failed to update ping bits\n");
>> +        return ret;
>> +    }
>> +
>> +    ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
>> +    if (!ret) {
>> +        ping_failed = -ETIMEDOUT;
>> +        dev_err(q6v5->dev, "Failed to get back pong\n");
>> +    }
>> +
>> +    /* Clear ping bit master kernel */
>> +    ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
>> +    if (ret) {
>> +        pr_err("Failed to clear master kernel bits\n");
>> +        return ret;
>> +    }
>> +
>> +    if (ping_failed)
>> +        return ping_failed;
>> +
>> +    return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
>> +
>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
>> +{
>> +    int ret = -ENODEV;
>> +
>> +    q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
>> +    if (IS_ERR(q6v5->ping_state)) {
>> +        dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
>> +            PTR_ERR(q6v5->ping_state));
>> +        return ret;
>> +    }
>> +
>> +    q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
>> +    if (q6v5->pong_irq < 0)
>> +        return q6v5->pong_irq;
>> +
>> +    ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
>> +                    q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
>> +                    "q6v5 pong", q6v5);
>> +    if (ret)
>> +        dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
>> +
>> +    init_completion(&q6v5->ping_done);
> 
> Hello Jingyi,
> 
> Since no IRQF_NO_AUTOEN flag is passed to devm_request_threaded_irq(),
> the IRQ may be enabled immediately after registration.
> If the thread_fn q6v5_pong_interrupt runs before
> init_completion(&q6v5->ping_done) is called, it may lead to accessing an
> uninitialized completion structure ?
> 
> 

Hi Zhongqiu, q6v5_pong_interrupt will only trigger after we call qcom_q6v5_ping_subsystem,
which must be called after this function.

Thanks,
Jingyi

>> +
>> +    return ret;
>> +}
>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
>> +
>>   /**
>>    * qcom_q6v5_init() - initializer of the q6v5 common struct
>>    * @q6v5:    handle to be initialized
>> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>    */
>>   int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>              struct rproc *rproc, int crash_reason, const char *load_state,
>> -           void (*handover)(struct qcom_q6v5 *q6v5))
>> +           bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
>>   {
>>       int ret;
>>   @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>       q6v5->dev = &pdev->dev;
>>       q6v5->crash_reason = crash_reason;
>>       q6v5->handover = handover;
>> +    q6v5->early_boot = early_boot;
>>         init_completion(&q6v5->start_done);
>>       init_completion(&q6v5->stop_done);
>>   +    if (early_boot)
>> +        init_completion(&q6v5->subsys_booted);
>> +
>>       q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
>>       if (q6v5->wdog_irq < 0)
>>           return q6v5->wdog_irq;
>> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
>> index 5a859c41896e..8a227bf70d7e 100644
>> --- a/drivers/remoteproc/qcom_q6v5.h
>> +++ b/drivers/remoteproc/qcom_q6v5.h
>> @@ -12,27 +12,35 @@ struct rproc;
>>   struct qcom_smem_state;
>>   struct qcom_sysmon;
>>   +#define PING_TIMEOUT 500 /* in milliseconds */
>> +#define PING_TEST_WAIT 500 /* in milliseconds */
>> +
>>   struct qcom_q6v5 {
>>       struct device *dev;
>>       struct rproc *rproc;
>>         struct qcom_smem_state *state;
>> +    struct qcom_smem_state *ping_state;
>>       struct qmp *qmp;
>>         struct icc_path *path;
>>         unsigned stop_bit;
>> +    unsigned int ping_bit;
>>         int wdog_irq;
>>       int fatal_irq;
>>       int ready_irq;
>>       int handover_irq;
>>       int stop_irq;
>> +    int pong_irq;
>>         bool handover_issued;
>>         struct completion start_done;
>>       struct completion stop_done;
>> +    struct completion subsys_booted;
>> +    struct completion ping_done;
>>         int crash_reason;
>>   @@ -40,11 +48,13 @@ struct qcom_q6v5 {
>>         const char *load_state;
>>       void (*handover)(struct qcom_q6v5 *q6v5);
>> +
>> +    bool early_boot;
>>   };
>>     int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>              struct rproc *rproc, int crash_reason, const char *load_state,
>> -           void (*handover)(struct qcom_q6v5 *q6v5));
>> +           bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
>>   void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
>>     int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
>> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
>>   int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
>>   int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
>>   unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
>>     #endif
>> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
>> index e98b7e03162c..1576b435b921 100644
>> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
>> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
>> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
>>           goto disable_pm;
>>         ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
>> -                 desc->load_state, qcom_adsp_pil_handover);
>> +                 desc->load_state, false, qcom_adsp_pil_handover);
>>       if (ret)
>>           goto disable_pm;
>>   diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 0c0199fb0e68..04e577541c8f 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
>>       qproc->has_mba_logs = desc->has_mba_logs;
>>         ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
>> -                 qcom_msa_handover);
>> +                 false, qcom_msa_handover);
>>       if (ret)
>>           goto detach_proxy_pds;
>>   diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
>> index 55a7da801183..99163e48a76a 100644
>> --- a/drivers/remoteproc/qcom_q6v5_pas.c
>> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
>> @@ -35,6 +35,8 @@
>>     #define MAX_ASSIGN_COUNT 3
>>   +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
>> +
>>   struct qcom_pas_data {
>>       int crash_reason_smem;
>>       const char *firmware_name;
>> @@ -58,6 +60,7 @@ struct qcom_pas_data {
>>       int region_assign_count;
>>       bool region_assign_shared;
>>       int region_assign_vmid;
>> +    bool early_boot;
>>   };
>>     struct qcom_pas {
>> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
>>       return qcom_q6v5_panic(&pas->q6v5);
>>   }
>>   +static int qcom_pas_attach(struct rproc *rproc)
>> +{
>> +    int ret;
>> +    struct qcom_pas *adsp = rproc->priv;
>> +    bool ready_state;
>> +    bool crash_state;
>> +
>> +    if (!adsp->q6v5.early_boot)
>> +        return -EINVAL;
>> +
>> +    ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
>> +                    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
>> +
>> +    if (crash_state) {
>> +        dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
>> +        adsp->rproc->state = RPROC_CRASHED;
>> +        return -EINVAL;
>> +    }
>> +
>> +    ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
>> +                    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
>> +
>> +    if (ready_state) {
>> +        dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
>> +        adsp->rproc->state = RPROC_DETACHED;
>> +    } else {
>> +        ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
>> +                          msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
>> +        if (!ret) {
>> +            dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
>> +            return -ETIMEDOUT;
>> +        }
>> +    }
>> +
>> +    ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
>> +    if (ret) {
>> +        dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
>> +        rproc->state = RPROC_CRASHED;
>> +        return ret;
>> +    }
>> +
>> +    adsp->q6v5.running = true;
>> +    return ret;
>> +}
>> +
>>   static const struct rproc_ops qcom_pas_ops = {
>>       .unprepare = qcom_pas_unprepare,
>>       .start = qcom_pas_start,
>> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
>>       .parse_fw = qcom_register_dump_segments,
>>       .load = qcom_pas_load,
>>       .panic = qcom_pas_panic,
>> +    .attach = qcom_pas_attach,
>>   };
>>     static const struct rproc_ops qcom_pas_minidump_ops = {
>> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>       pas->proxy_pd_count = ret;
>>         ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
>> -                 desc->load_state, qcom_pas_handover);
>> +                 desc->load_state, desc->early_boot, qcom_pas_handover);
>>       if (ret)
>>           goto detach_proxy_pds;
>>   @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>       }
>>         qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
>> +
>> +    if (pas->q6v5.early_boot) {
>> +        ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
>> +        if (ret)
>> +            dev_err(&pdev->dev,
>> +                "Unable to find ping/pong bits, falling back to firmware load\n");
>> +        else
>> +            pas->rproc->state = RPROC_DETACHED;
>> +    }
>> +
>>       ret = rproc_add(rproc);
>>       if (ret)
>>           goto remove_ssr_sysmon;
>>
> 
> 

Re: [PATCH 6/6] remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali

[Jingyi Wang]

On 9/25/2025 7:42 PM, Konrad Dybcio wrote:
> On 9/25/25 1:37 AM, Jingyi Wang wrote:
>> The SoC Control Processor (SoCCP) is small RISC-V MCU that controls
>> USB Type-C, battery charging and various other functions on Qualcomm SoCs.
>> It provides a solution for control-plane processing, reducing per-subsystem
>> microcontroller reinvention. Add support for SoCCP PAS loader on Kaanapali
>> platform.
>>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>  drivers/remoteproc/qcom_q6v5_pas.c | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
>> index 99163e48a76a..5007e1706699 100644
>> --- a/drivers/remoteproc/qcom_q6v5_pas.c
>> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
>> @@ -1487,7 +1487,25 @@ static const struct qcom_pas_data sm8750_mpss_resource = {
>>  	.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
>>  };
>>  
>> +static const struct qcom_pas_data kaanapali_soccp_resource = {
>> +	.crash_reason_smem = 656,
>> +	.firmware_name = "soccp.mdt",
>> +	.dtb_firmware_name = "soccp_dtb.mdt",
> 
> .mbn?
> 
> Konrad

Will fix.

Thanks,
Jingyi

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Jingyi Wang]

On 9/25/2025 11:04 AM, Dmitry Baryshkov wrote:
> On Wed, Sep 24, 2025 at 04:37:26PM -0700, Jingyi Wang wrote:
>> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>>
>> Subsystems can be brought out of reset by entities such as
>> bootloaders. Before attaching such subsystems, it is important to
>> check the state of the subsystem. This patch adds support to attach
>> to a subsystem by ensuring that the subsystem is in a sane state by
>> reading SMP2P bits and pinging the subsystem.
>>
>> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>  drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
>>  drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
>>  drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
>>  drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
>>  drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
>>  5 files changed, 163 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
>> index 4ee5e67a9f03..cba05e1d6d52 100644
>> --- a/drivers/remoteproc/qcom_q6v5.c
>> +++ b/drivers/remoteproc/qcom_q6v5.c
>> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
>>  	size_t len;
>>  	char *msg;
>>  
>> +	if (q6v5->early_boot)
>> +		complete(&q6v5->subsys_booted);
> 
> Where do we clean this flag? I think you current code breaks restarting
> of ADSP. Once the ADSP is brought up, the flag should be cleared and
> further handling of the ADSP should follow the normal flow.
> 

q6v5->subsys_booted can not be cleared now, it is only checked in the 
qcom_pas_attach callback, so the bootup process will not be infected, 
we have tested shutdown->bootup process and it runs as expected.

Thanks,
Jingyi


>> +
>>  	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
>>  	if (!q6v5->running) {
>>  		complete(&q6v5->stop_done);
>> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
>>  	size_t len;
>>  	char *msg;
>>  
>> +	if (q6v5->early_boot)
>> +		complete(&q6v5->subsys_booted);
>> +
>>  	if (!q6v5->running)
>>  		return IRQ_HANDLED;
>>  
>> @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
>>  
>>  	complete(&q6v5->start_done);
>>  
>> +	if (q6v5->early_boot)
>> +		complete(&q6v5->subsys_booted);
>> +
>>  	return IRQ_HANDLED;
>>  }
>>  
>> @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
>>  	if (q6v5->handover)
>>  		q6v5->handover(q6v5);
>>  
>> +	if (q6v5->early_boot)
>> +		complete(&q6v5->subsys_booted);
>> +
>>  	icc_set_bw(q6v5->path, 0, 0);
>>  
>>  	q6v5->handover_issued = true;
>> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
>>  }
>>  EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>  
>> +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
>> +{
>> +	struct qcom_q6v5 *q6v5 = data;
>> +
>> +	complete(&q6v5->ping_done);
>> +
>> +	return IRQ_HANDLED;
>> +}
>> +
>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
>> +{
>> +	int ret;
>> +	int ping_failed = 0;
>> +
>> +	reinit_completion(&q6v5->ping_done);
>> +
>> +	/* Set master kernel Ping bit */
>> +	ret = qcom_smem_state_update_bits(q6v5->ping_state,
>> +					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
>> +	if (ret) {
>> +		dev_err(q6v5->dev, "Failed to update ping bits\n");
>> +		return ret;
>> +	}
>> +
>> +	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
>> +	if (!ret) {
>> +		ping_failed = -ETIMEDOUT;
>> +		dev_err(q6v5->dev, "Failed to get back pong\n");
>> +	}
>> +
>> +	/* Clear ping bit master kernel */
>> +	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
>> +	if (ret) {
>> +		pr_err("Failed to clear master kernel bits\n");
>> +		return ret;
>> +	}
>> +
>> +	if (ping_failed)
>> +		return ping_failed;
>> +
>> +	return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
>> +
>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
>> +{
>> +	int ret = -ENODEV;
>> +
>> +	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
>> +	if (IS_ERR(q6v5->ping_state)) {
>> +		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
>> +			PTR_ERR(q6v5->ping_state));
>> +		return ret;
>> +	}
>> +
>> +	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
>> +	if (q6v5->pong_irq < 0)
>> +		return q6v5->pong_irq;
>> +
>> +	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
>> +					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
>> +					"q6v5 pong", q6v5);
>> +	if (ret)
>> +		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
>> +
>> +	init_completion(&q6v5->ping_done);
>> +
>> +	return ret;
>> +}
>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
>> +
>>  /**
>>   * qcom_q6v5_init() - initializer of the q6v5 common struct
>>   * @q6v5:	handle to be initialized
>> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>   */
>>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>  		   struct rproc *rproc, int crash_reason, const char *load_state,
>> -		   void (*handover)(struct qcom_q6v5 *q6v5))
>> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
>>  {
>>  	int ret;
>>  
>> @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>  	q6v5->dev = &pdev->dev;
>>  	q6v5->crash_reason = crash_reason;
>>  	q6v5->handover = handover;
>> +	q6v5->early_boot = early_boot;
>>  
>>  	init_completion(&q6v5->start_done);
>>  	init_completion(&q6v5->stop_done);
>>  
>> +	if (early_boot)
>> +		init_completion(&q6v5->subsys_booted);
>> +
>>  	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
>>  	if (q6v5->wdog_irq < 0)
>>  		return q6v5->wdog_irq;
>> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
>> index 5a859c41896e..8a227bf70d7e 100644
>> --- a/drivers/remoteproc/qcom_q6v5.h
>> +++ b/drivers/remoteproc/qcom_q6v5.h
>> @@ -12,27 +12,35 @@ struct rproc;
>>  struct qcom_smem_state;
>>  struct qcom_sysmon;
>>  
>> +#define PING_TIMEOUT 500 /* in milliseconds */
>> +#define PING_TEST_WAIT 500 /* in milliseconds */
>> +
>>  struct qcom_q6v5 {
>>  	struct device *dev;
>>  	struct rproc *rproc;
>>  
>>  	struct qcom_smem_state *state;
>> +	struct qcom_smem_state *ping_state;
>>  	struct qmp *qmp;
>>  
>>  	struct icc_path *path;
>>  
>>  	unsigned stop_bit;
>> +	unsigned int ping_bit;
>>  
>>  	int wdog_irq;
>>  	int fatal_irq;
>>  	int ready_irq;
>>  	int handover_irq;
>>  	int stop_irq;
>> +	int pong_irq;
>>  
>>  	bool handover_issued;
>>  
>>  	struct completion start_done;
>>  	struct completion stop_done;
>> +	struct completion subsys_booted;
>> +	struct completion ping_done;
>>  
>>  	int crash_reason;
>>  
>> @@ -40,11 +48,13 @@ struct qcom_q6v5 {
>>  
>>  	const char *load_state;
>>  	void (*handover)(struct qcom_q6v5 *q6v5);
>> +
>> +	bool early_boot;
>>  };
>>  
>>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>  		   struct rproc *rproc, int crash_reason, const char *load_state,
>> -		   void (*handover)(struct qcom_q6v5 *q6v5));
>> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
>>  void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
>>  
>>  int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
>> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
>>  int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
>>  int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
>>  unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
>>  
>>  #endif
>> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
>> index e98b7e03162c..1576b435b921 100644
>> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
>> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
>> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
>>  		goto disable_pm;
>>  
>>  	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
>> -			     desc->load_state, qcom_adsp_pil_handover);
>> +			     desc->load_state, false, qcom_adsp_pil_handover);
>>  	if (ret)
>>  		goto disable_pm;
>>  
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 0c0199fb0e68..04e577541c8f 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
>>  	qproc->has_mba_logs = desc->has_mba_logs;
>>  
>>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
>> -			     qcom_msa_handover);
>> +			     false, qcom_msa_handover);
>>  	if (ret)
>>  		goto detach_proxy_pds;
>>  
>> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
>> index 55a7da801183..99163e48a76a 100644
>> --- a/drivers/remoteproc/qcom_q6v5_pas.c
>> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
>> @@ -35,6 +35,8 @@
>>  
>>  #define MAX_ASSIGN_COUNT 3
>>  
>> +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
>> +
>>  struct qcom_pas_data {
>>  	int crash_reason_smem;
>>  	const char *firmware_name;
>> @@ -58,6 +60,7 @@ struct qcom_pas_data {
>>  	int region_assign_count;
>>  	bool region_assign_shared;
>>  	int region_assign_vmid;
>> +	bool early_boot;
>>  };
>>  
>>  struct qcom_pas {
>> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
>>  	return qcom_q6v5_panic(&pas->q6v5);
>>  }
>>  
>> +static int qcom_pas_attach(struct rproc *rproc)
>> +{
>> +	int ret;
>> +	struct qcom_pas *adsp = rproc->priv;
>> +	bool ready_state;
>> +	bool crash_state;
>> +
>> +	if (!adsp->q6v5.early_boot)
>> +		return -EINVAL;
>> +
>> +	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
>> +				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
>> +
>> +	if (crash_state) {
>> +		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
>> +		adsp->rproc->state = RPROC_CRASHED;
>> +		return -EINVAL;
>> +	}
>> +
>> +	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
>> +				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
>> +
>> +	if (ready_state) {
>> +		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
>> +		adsp->rproc->state = RPROC_DETACHED;
>> +	} else {
>> +		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
>> +						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
>> +		if (!ret) {
>> +			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
>> +			return -ETIMEDOUT;
>> +		}
>> +	}
>> +
>> +	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
>> +	if (ret) {
>> +		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
>> +		rproc->state = RPROC_CRASHED;
>> +		return ret;
>> +	}
>> +
>> +	adsp->q6v5.running = true;
>> +	return ret;
>> +}
>> +
>>  static const struct rproc_ops qcom_pas_ops = {
>>  	.unprepare = qcom_pas_unprepare,
>>  	.start = qcom_pas_start,
>> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
>>  	.parse_fw = qcom_register_dump_segments,
>>  	.load = qcom_pas_load,
>>  	.panic = qcom_pas_panic,
>> +	.attach = qcom_pas_attach,
>>  };
>>  
>>  static const struct rproc_ops qcom_pas_minidump_ops = {
>> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>  	pas->proxy_pd_count = ret;
>>  
>>  	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
>> -			     desc->load_state, qcom_pas_handover);
>> +			     desc->load_state, desc->early_boot, qcom_pas_handover);
>>  	if (ret)
>>  		goto detach_proxy_pds;
>>  
>> @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>  	}
>>  
>>  	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
>> +
>> +	if (pas->q6v5.early_boot) {
>> +		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
>> +		if (ret)
>> +			dev_err(&pdev->dev,
>> +				"Unable to find ping/pong bits, falling back to firmware load\n");
>> +		else
>> +			pas->rproc->state = RPROC_DETACHED;
>> +	}
>> +
>>  	ret = rproc_add(rproc);
>>  	if (ret)
>>  		goto remove_ssr_sysmon;
>>
>> -- 
>> 2.25.1
>>
> 

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Dmitry Baryshkov]

On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
> 
> 
> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
> > On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
> >>
> >> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
> >> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
> >> interrupt.
> >>
> >> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >> ---
> >>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
> >>  1 file changed, 19 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> index be9e2a0bc060..031fdf36a66c 100644
> >> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> @@ -35,6 +35,9 @@ properties:
> >>        - items:
> >>            - const: qcom,sm8750-cdsp-pas
> >>            - const: qcom,sm8650-cdsp-pas
> >> +      - items:
> >> +          - const: qcom,kaanapali-cdsp-pas
> >> +          - const: qcom,sm8550-cdsp-pas
> > 
> > 
> > This time maybe without HTML:
> > 
> > This looks wrong. This is not compatible with SM8550.
> 
> Could you point out what is the difference from your perspecetive?
> it is the same as SM8550 except for there is one more interrupt,
> which is also described in this patch.

I'd second Krzysztof here. Your description points out that it is _not_
compatible to SM8550.

-- 
With best wishes
Dmitry

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Dmitry Baryshkov]

On Mon, Sep 29, 2025 at 02:42:10PM +0800, Jingyi Wang wrote:
> 
> 
> On 9/25/2025 11:04 AM, Dmitry Baryshkov wrote:
> > On Wed, Sep 24, 2025 at 04:37:26PM -0700, Jingyi Wang wrote:
> >> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> >>
> >> Subsystems can be brought out of reset by entities such as
> >> bootloaders. Before attaching such subsystems, it is important to
> >> check the state of the subsystem. This patch adds support to attach
> >> to a subsystem by ensuring that the subsystem is in a sane state by
> >> reading SMP2P bits and pinging the subsystem.
> >>
> >> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
> >> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >> ---
> >>  drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
> >>  drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
> >>  drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
> >>  drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
> >>  drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
> >>  5 files changed, 163 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
> >> index 4ee5e67a9f03..cba05e1d6d52 100644
> >> --- a/drivers/remoteproc/qcom_q6v5.c
> >> +++ b/drivers/remoteproc/qcom_q6v5.c
> >> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
> >>  	size_t len;
> >>  	char *msg;
> >>  
> >> +	if (q6v5->early_boot)
> >> +		complete(&q6v5->subsys_booted);
> > 
> > Where do we clean this flag? I think you current code breaks restarting
> > of ADSP. Once the ADSP is brought up, the flag should be cleared and
> > further handling of the ADSP should follow the normal flow.
> > 
> 
> q6v5->subsys_booted can not be cleared now, it is only checked in the 
> qcom_pas_attach callback, so the bootup process will not be infected, 
> we have tested shutdown->bootup process and it runs as expected.

I was more interested in clearing the early_boot flag.

> 
> Thanks,
> Jingyi
> 
> 
> >> +
> >>  	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
> >>  	if (!q6v5->running) {
> >>  		complete(&q6v5->stop_done);
> >> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
> >>  	size_t len;
> >>  	char *msg;
> >>  
> >> +	if (q6v5->early_boot)
> >> +		complete(&q6v5->subsys_booted);
> >> +
> >>  	if (!q6v5->running)
> >>  		return IRQ_HANDLED;
> >>  
> >> @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
> >>  
> >>  	complete(&q6v5->start_done);
> >>  
> >> +	if (q6v5->early_boot)
> >> +		complete(&q6v5->subsys_booted);
> >> +
> >>  	return IRQ_HANDLED;
> >>  }
> >>  
> >> @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
> >>  	if (q6v5->handover)
> >>  		q6v5->handover(q6v5);
> >>  
> >> +	if (q6v5->early_boot)
> >> +		complete(&q6v5->subsys_booted);
> >> +
> >>  	icc_set_bw(q6v5->path, 0, 0);
> >>  
> >>  	q6v5->handover_issued = true;
> >> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
> >>  }
> >>  EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
> >>  
> >> +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
> >> +{
> >> +	struct qcom_q6v5 *q6v5 = data;
> >> +
> >> +	complete(&q6v5->ping_done);
> >> +
> >> +	return IRQ_HANDLED;
> >> +}
> >> +
> >> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
> >> +{
> >> +	int ret;
> >> +	int ping_failed = 0;
> >> +
> >> +	reinit_completion(&q6v5->ping_done);
> >> +
> >> +	/* Set master kernel Ping bit */
> >> +	ret = qcom_smem_state_update_bits(q6v5->ping_state,
> >> +					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
> >> +	if (ret) {
> >> +		dev_err(q6v5->dev, "Failed to update ping bits\n");
> >> +		return ret;
> >> +	}
> >> +
> >> +	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
> >> +	if (!ret) {
> >> +		ping_failed = -ETIMEDOUT;
> >> +		dev_err(q6v5->dev, "Failed to get back pong\n");
> >> +	}
> >> +
> >> +	/* Clear ping bit master kernel */
> >> +	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
> >> +	if (ret) {
> >> +		pr_err("Failed to clear master kernel bits\n");
> >> +		return ret;
> >> +	}
> >> +
> >> +	if (ping_failed)
> >> +		return ping_failed;
> >> +
> >> +	return 0;
> >> +}
> >> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
> >> +
> >> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
> >> +{
> >> +	int ret = -ENODEV;
> >> +
> >> +	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
> >> +	if (IS_ERR(q6v5->ping_state)) {
> >> +		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
> >> +			PTR_ERR(q6v5->ping_state));
> >> +		return ret;
> >> +	}
> >> +
> >> +	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
> >> +	if (q6v5->pong_irq < 0)
> >> +		return q6v5->pong_irq;
> >> +
> >> +	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
> >> +					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
> >> +					"q6v5 pong", q6v5);
> >> +	if (ret)
> >> +		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
> >> +
> >> +	init_completion(&q6v5->ping_done);
> >> +
> >> +	return ret;
> >> +}
> >> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
> >> +
> >>  /**
> >>   * qcom_q6v5_init() - initializer of the q6v5 common struct
> >>   * @q6v5:	handle to be initialized
> >> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
> >>   */
> >>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
> >>  		   struct rproc *rproc, int crash_reason, const char *load_state,
> >> -		   void (*handover)(struct qcom_q6v5 *q6v5))
> >> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
> >>  {
> >>  	int ret;
> >>  
> >> @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
> >>  	q6v5->dev = &pdev->dev;
> >>  	q6v5->crash_reason = crash_reason;
> >>  	q6v5->handover = handover;
> >> +	q6v5->early_boot = early_boot;
> >>  
> >>  	init_completion(&q6v5->start_done);
> >>  	init_completion(&q6v5->stop_done);
> >>  
> >> +	if (early_boot)
> >> +		init_completion(&q6v5->subsys_booted);
> >> +
> >>  	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
> >>  	if (q6v5->wdog_irq < 0)
> >>  		return q6v5->wdog_irq;
> >> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
> >> index 5a859c41896e..8a227bf70d7e 100644
> >> --- a/drivers/remoteproc/qcom_q6v5.h
> >> +++ b/drivers/remoteproc/qcom_q6v5.h
> >> @@ -12,27 +12,35 @@ struct rproc;
> >>  struct qcom_smem_state;
> >>  struct qcom_sysmon;
> >>  
> >> +#define PING_TIMEOUT 500 /* in milliseconds */
> >> +#define PING_TEST_WAIT 500 /* in milliseconds */
> >> +
> >>  struct qcom_q6v5 {
> >>  	struct device *dev;
> >>  	struct rproc *rproc;
> >>  
> >>  	struct qcom_smem_state *state;
> >> +	struct qcom_smem_state *ping_state;
> >>  	struct qmp *qmp;
> >>  
> >>  	struct icc_path *path;
> >>  
> >>  	unsigned stop_bit;
> >> +	unsigned int ping_bit;
> >>  
> >>  	int wdog_irq;
> >>  	int fatal_irq;
> >>  	int ready_irq;
> >>  	int handover_irq;
> >>  	int stop_irq;
> >> +	int pong_irq;
> >>  
> >>  	bool handover_issued;
> >>  
> >>  	struct completion start_done;
> >>  	struct completion stop_done;
> >> +	struct completion subsys_booted;
> >> +	struct completion ping_done;
> >>  
> >>  	int crash_reason;
> >>  
> >> @@ -40,11 +48,13 @@ struct qcom_q6v5 {
> >>  
> >>  	const char *load_state;
> >>  	void (*handover)(struct qcom_q6v5 *q6v5);
> >> +
> >> +	bool early_boot;
> >>  };
> >>  
> >>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
> >>  		   struct rproc *rproc, int crash_reason, const char *load_state,
> >> -		   void (*handover)(struct qcom_q6v5 *q6v5));
> >> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
> >>  void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
> >>  
> >>  int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
> >> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
> >>  int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
> >>  int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
> >>  unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
> >> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
> >> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
> >>  
> >>  #endif
> >> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
> >> index e98b7e03162c..1576b435b921 100644
> >> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
> >> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
> >> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
> >>  		goto disable_pm;
> >>  
> >>  	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
> >> -			     desc->load_state, qcom_adsp_pil_handover);
> >> +			     desc->load_state, false, qcom_adsp_pil_handover);
> >>  	if (ret)
> >>  		goto disable_pm;
> >>  
> >> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> >> index 0c0199fb0e68..04e577541c8f 100644
> >> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> >> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> >> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
> >>  	qproc->has_mba_logs = desc->has_mba_logs;
> >>  
> >>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
> >> -			     qcom_msa_handover);
> >> +			     false, qcom_msa_handover);
> >>  	if (ret)
> >>  		goto detach_proxy_pds;
> >>  
> >> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> >> index 55a7da801183..99163e48a76a 100644
> >> --- a/drivers/remoteproc/qcom_q6v5_pas.c
> >> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> >> @@ -35,6 +35,8 @@
> >>  
> >>  #define MAX_ASSIGN_COUNT 3
> >>  
> >> +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
> >> +
> >>  struct qcom_pas_data {
> >>  	int crash_reason_smem;
> >>  	const char *firmware_name;
> >> @@ -58,6 +60,7 @@ struct qcom_pas_data {
> >>  	int region_assign_count;
> >>  	bool region_assign_shared;
> >>  	int region_assign_vmid;
> >> +	bool early_boot;
> >>  };
> >>  
> >>  struct qcom_pas {
> >> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
> >>  	return qcom_q6v5_panic(&pas->q6v5);
> >>  }
> >>  
> >> +static int qcom_pas_attach(struct rproc *rproc)
> >> +{
> >> +	int ret;
> >> +	struct qcom_pas *adsp = rproc->priv;
> >> +	bool ready_state;
> >> +	bool crash_state;
> >> +
> >> +	if (!adsp->q6v5.early_boot)
> >> +		return -EINVAL;
> >> +
> >> +	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
> >> +				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
> >> +
> >> +	if (crash_state) {
> >> +		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
> >> +		adsp->rproc->state = RPROC_CRASHED;
> >> +		return -EINVAL;
> >> +	}
> >> +
> >> +	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
> >> +				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
> >> +
> >> +	if (ready_state) {
> >> +		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
> >> +		adsp->rproc->state = RPROC_DETACHED;
> >> +	} else {
> >> +		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
> >> +						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
> >> +		if (!ret) {
> >> +			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
> >> +			return -ETIMEDOUT;
> >> +		}
> >> +	}
> >> +
> >> +	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
> >> +	if (ret) {
> >> +		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
> >> +		rproc->state = RPROC_CRASHED;
> >> +		return ret;
> >> +	}
> >> +
> >> +	adsp->q6v5.running = true;
> >> +	return ret;
> >> +}
> >> +
> >>  static const struct rproc_ops qcom_pas_ops = {
> >>  	.unprepare = qcom_pas_unprepare,
> >>  	.start = qcom_pas_start,
> >> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
> >>  	.parse_fw = qcom_register_dump_segments,
> >>  	.load = qcom_pas_load,
> >>  	.panic = qcom_pas_panic,
> >> +	.attach = qcom_pas_attach,
> >>  };
> >>  
> >>  static const struct rproc_ops qcom_pas_minidump_ops = {
> >> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
> >>  	pas->proxy_pd_count = ret;
> >>  
> >>  	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
> >> -			     desc->load_state, qcom_pas_handover);
> >> +			     desc->load_state, desc->early_boot, qcom_pas_handover);
> >>  	if (ret)
> >>  		goto detach_proxy_pds;
> >>  
> >> @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
> >>  	}
> >>  
> >>  	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
> >> +
> >> +	if (pas->q6v5.early_boot) {
> >> +		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
> >> +		if (ret)
> >> +			dev_err(&pdev->dev,
> >> +				"Unable to find ping/pong bits, falling back to firmware load\n");
> >> +		else
> >> +			pas->rproc->state = RPROC_DETACHED;
> >> +	}
> >> +
> >>  	ret = rproc_add(rproc);
> >>  	if (ret)
> >>  		goto remove_ssr_sysmon;
> >>
> >> -- 
> >> 2.25.1
> >>
> > 
> 

-- 
With best wishes
Dmitry

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Dmitry Baryshkov]

On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
> 
> 
> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
> > On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
> >> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
> >> compatible with SM8750, which can fallback to SM8550 except for one more
> >> interrupt ("shutdown-ack").
> >>
> >> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >> ---
> >>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
> >>  1 file changed, 5 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> index 2dd479cf4821..be9e2a0bc060 100644
> >> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >> @@ -28,7 +28,9 @@ properties:
> >>            - qcom,x1e80100-adsp-pas
> >>            - qcom,x1e80100-cdsp-pas
> >>        - items:
> >> -          - const: qcom,sm8750-adsp-pas
> >> +          - enum:
> >> +              - qcom,kaanapali-adsp-pas
> >> +              - qcom,sm8750-adsp-pas
> >>            - const: qcom,sm8550-adsp-pas
> >>        - items:
> >>            - const: qcom,sm8750-cdsp-pas
> >> @@ -95,6 +97,7 @@ allOf:
> >>          compatible:
> >>            contains:
> >>              enum:
> >> +              - qcom,kaanapali-adsp-pas
> > 
> > This one and the next entry are redundant. Do you see why?
> > 
> 
> This one describe the interrupt:
> 
>   - if:
>       properties:
>         compatible:
>           contains:

>             enum:
>               - qcom,kaanapali-adsp-pas
>               - qcom,sm8750-adsp-pas

It's still redundant. Don't you see it?

>     then:
>       properties:
>         interrupts:
>           maxItems: 6
>         interrupt-names:
>           maxItems: 6
>         memory-region:
>           maxItems: 2
> 
> 
> >>                - qcom,sm8750-adsp-pas
> >>      then:
> >>        properties:
> >> @@ -185,6 +188,7 @@ allOf:
> >>          compatible:
> >>            contains:
> >>              enum:
> >> +              - qcom,kaanapali-adsp-pas
> 
> This one describe the power domain
> 
>   - if:
>       properties:
>         compatible:
>           contains:
>             enum:
>               - qcom,kaanapali-adsp-pas
>               - qcom,sm8550-adsp-pas
>               - qcom,sm8650-adsp-pas
>               - qcom,sm8750-adsp-pas
>               - qcom,x1e80100-adsp-pas

Likewise

>     then:
>       properties:
>         power-domains:
>           items:
>             - description: LCX power domain
>             - description: LMX power domain
>         power-domain-names:
>           items:
>             - const: lcx
>             - const: lmx
> 
> 
> >>                - qcom,sm8550-adsp-pas
> >>                - qcom,sm8650-adsp-pas
> >>                - qcom,sm8750-adsp-pas
> >>
> >> -- 
> >> 2.25.1
> >>
> > 
> 
> Thanks,
> Jingyi

-- 
With best wishes
Dmitry

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>
>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>> interrupt.
>>>>
>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>> ---
>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>  1 file changed, 19 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> @@ -35,6 +35,9 @@ properties:
>>>>        - items:
>>>>            - const: qcom,sm8750-cdsp-pas
>>>>            - const: qcom,sm8650-cdsp-pas
>>>> +      - items:
>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>> +          - const: qcom,sm8550-cdsp-pas
>>>
>>>
>>> This time maybe without HTML:
>>>
>>> This looks wrong. This is not compatible with SM8550.
>>
>> Could you point out what is the difference from your perspecetive?
>> it is the same as SM8550 except for there is one more interrupt,
>> which is also described in this patch.
> 
> I'd second Krzysztof here. Your description points out that it is _not_
> compatible to SM8550.
> 

Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
difference in interrupt:
https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/

Thanks,
Jingyi

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Dmitry Baryshkov]

On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
> 
> 
> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
> > On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
> >>
> >>
> >> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
> >>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
> >>>>
> >>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
> >>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
> >>>> interrupt.
> >>>>
> >>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >>>> ---
> >>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
> >>>>  1 file changed, 19 insertions(+)
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> index be9e2a0bc060..031fdf36a66c 100644
> >>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> @@ -35,6 +35,9 @@ properties:
> >>>>        - items:
> >>>>            - const: qcom,sm8750-cdsp-pas
> >>>>            - const: qcom,sm8650-cdsp-pas
> >>>> +      - items:
> >>>> +          - const: qcom,kaanapali-cdsp-pas
> >>>> +          - const: qcom,sm8550-cdsp-pas
> >>>
> >>>
> >>> This time maybe without HTML:
> >>>
> >>> This looks wrong. This is not compatible with SM8550.
> >>
> >> Could you point out what is the difference from your perspecetive?
> >> it is the same as SM8550 except for there is one more interrupt,
> >> which is also described in this patch.
> > 
> > I'd second Krzysztof here. Your description points out that it is _not_
> > compatible to SM8550.
> > 
> 
> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
> difference in interrupt:
> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/

Interesting. Let's wait for Krzysztof's response then.

-- 
With best wishes
Dmitry

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Jingyi Wang]

On 9/29/2025 5:39 PM, Dmitry Baryshkov wrote:
> On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
>>> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
>>>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
>>>> compatible with SM8750, which can fallback to SM8550 except for one more
>>>> interrupt ("shutdown-ack").
>>>>
>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>> ---
>>>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> index 2dd479cf4821..be9e2a0bc060 100644
>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>> @@ -28,7 +28,9 @@ properties:
>>>>            - qcom,x1e80100-adsp-pas
>>>>            - qcom,x1e80100-cdsp-pas
>>>>        - items:
>>>> -          - const: qcom,sm8750-adsp-pas
>>>> +          - enum:
>>>> +              - qcom,kaanapali-adsp-pas
>>>> +              - qcom,sm8750-adsp-pas
>>>>            - const: qcom,sm8550-adsp-pas
>>>>        - items:
>>>>            - const: qcom,sm8750-cdsp-pas
>>>> @@ -95,6 +97,7 @@ allOf:
>>>>          compatible:
>>>>            contains:
>>>>              enum:
>>>> +              - qcom,kaanapali-adsp-pas
>>>
>>> This one and the next entry are redundant. Do you see why?
>>>
>>
>> This one describe the interrupt:
>>
>>   - if:
>>       properties:
>>         compatible:
>>           contains:
> 
>>             enum:
>>               - qcom,kaanapali-adsp-pas
>>               - qcom,sm8750-adsp-pas
> 
> It's still redundant. Don't you see it?
> 

sorry I didn't get your point here, could you explain more?

>>     then:
>>       properties:
>>         interrupts:
>>           maxItems: 6
>>         interrupt-names:
>>           maxItems: 6
>>         memory-region:
>>           maxItems: 2
>>
>>
>>>>                - qcom,sm8750-adsp-pas
>>>>      then:
>>>>        properties:
>>>> @@ -185,6 +188,7 @@ allOf:
>>>>          compatible:
>>>>            contains:
>>>>              enum:
>>>> +              - qcom,kaanapali-adsp-pas
>>
>> This one describe the power domain
>>
>>   - if:
>>       properties:
>>         compatible:
>>           contains:
>>             enum:
>>               - qcom,kaanapali-adsp-pas
>>               - qcom,sm8550-adsp-pas
>>               - qcom,sm8650-adsp-pas
>>               - qcom,sm8750-adsp-pas
>>               - qcom,x1e80100-adsp-pas
> 
> Likewise
> 

indeed, here is redundant as "qcom,sm8550-adsp-pas" is added in
the dts. I will remove this.

Thanks,
Jingyi

>>     then:
>>       properties:
>>         power-domains:
>>           items:
>>             - description: LCX power domain
>>             - description: LMX power domain
>>         power-domain-names:
>>           items:
>>             - const: lcx
>>             - const: lmx
>>
>>
>>>>                - qcom,sm8550-adsp-pas
>>>>                - qcom,sm8650-adsp-pas
>>>>                - qcom,sm8750-adsp-pas
>>>>
>>>> -- 
>>>> 2.25.1
>>>>
>>>
>>
>> Thanks,
>> Jingyi
> 

Re: [PATCH 5/6] remoteproc: qcom: pas: Add late attach support for subsystems

[Jingyi Wang]

On 9/29/2025 5:35 PM, Dmitry Baryshkov wrote:
> On Mon, Sep 29, 2025 at 02:42:10PM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/25/2025 11:04 AM, Dmitry Baryshkov wrote:
>>> On Wed, Sep 24, 2025 at 04:37:26PM -0700, Jingyi Wang wrote:
>>>> From: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>>>>
>>>> Subsystems can be brought out of reset by entities such as
>>>> bootloaders. Before attaching such subsystems, it is important to
>>>> check the state of the subsystem. This patch adds support to attach
>>>> to a subsystem by ensuring that the subsystem is in a sane state by
>>>> reading SMP2P bits and pinging the subsystem.
>>>>
>>>> Signed-off-by: Gokul krishna Krishnakumar <Gokul.krishnakumar@oss.qualcomm>
>>>> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>> ---
>>>>  drivers/remoteproc/qcom_q6v5.c      | 89 ++++++++++++++++++++++++++++++++++++-
>>>>  drivers/remoteproc/qcom_q6v5.h      | 14 +++++-
>>>>  drivers/remoteproc/qcom_q6v5_adsp.c |  2 +-
>>>>  drivers/remoteproc/qcom_q6v5_mss.c  |  2 +-
>>>>  drivers/remoteproc/qcom_q6v5_pas.c  | 61 ++++++++++++++++++++++++-
>>>>  5 files changed, 163 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
>>>> index 4ee5e67a9f03..cba05e1d6d52 100644
>>>> --- a/drivers/remoteproc/qcom_q6v5.c
>>>> +++ b/drivers/remoteproc/qcom_q6v5.c
>>>> @@ -94,6 +94,9 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
>>>>  	size_t len;
>>>>  	char *msg;
>>>>  
>>>> +	if (q6v5->early_boot)
>>>> +		complete(&q6v5->subsys_booted);
>>>
>>> Where do we clean this flag? I think you current code breaks restarting
>>> of ADSP. Once the ADSP is brought up, the flag should be cleared and
>>> further handling of the ADSP should follow the normal flow.
>>>
>>
>> q6v5->subsys_booted can not be cleared now, it is only checked in the 
>> qcom_pas_attach callback, so the bootup process will not be infected, 
>> we have tested shutdown->bootup process and it runs as expected.
> 
> I was more interested in clearing the early_boot flag.
> 

Sure, we can clear it in the stop callback.

>>
>> Thanks,
>> Jingyi
>>
>>
>>>> +
>>>>  	/* Sometimes the stop triggers a watchdog rather than a stop-ack */
>>>>  	if (!q6v5->running) {
>>>>  		complete(&q6v5->stop_done);
>>>> @@ -118,6 +121,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
>>>>  	size_t len;
>>>>  	char *msg;
>>>>  
>>>> +	if (q6v5->early_boot)
>>>> +		complete(&q6v5->subsys_booted);
>>>> +
>>>>  	if (!q6v5->running)
>>>>  		return IRQ_HANDLED;
>>>>  
>>>> @@ -139,6 +145,9 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
>>>>  
>>>>  	complete(&q6v5->start_done);
>>>>  
>>>> +	if (q6v5->early_boot)
>>>> +		complete(&q6v5->subsys_booted);
>>>> +
>>>>  	return IRQ_HANDLED;
>>>>  }
>>>>  
>>>> @@ -170,6 +179,9 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
>>>>  	if (q6v5->handover)
>>>>  		q6v5->handover(q6v5);
>>>>  
>>>> +	if (q6v5->early_boot)
>>>> +		complete(&q6v5->subsys_booted);
>>>> +
>>>>  	icc_set_bw(q6v5->path, 0, 0);
>>>>  
>>>>  	q6v5->handover_issued = true;
>>>> @@ -232,6 +244,77 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
>>>>  }
>>>>  EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>>>  
>>>> +static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
>>>> +{
>>>> +	struct qcom_q6v5 *q6v5 = data;
>>>> +
>>>> +	complete(&q6v5->ping_done);
>>>> +
>>>> +	return IRQ_HANDLED;
>>>> +}
>>>> +
>>>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
>>>> +{
>>>> +	int ret;
>>>> +	int ping_failed = 0;
>>>> +
>>>> +	reinit_completion(&q6v5->ping_done);
>>>> +
>>>> +	/* Set master kernel Ping bit */
>>>> +	ret = qcom_smem_state_update_bits(q6v5->ping_state,
>>>> +					  BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
>>>> +	if (ret) {
>>>> +		dev_err(q6v5->dev, "Failed to update ping bits\n");
>>>> +		return ret;
>>>> +	}
>>>> +
>>>> +	ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(PING_TIMEOUT));
>>>> +	if (!ret) {
>>>> +		ping_failed = -ETIMEDOUT;
>>>> +		dev_err(q6v5->dev, "Failed to get back pong\n");
>>>> +	}
>>>> +
>>>> +	/* Clear ping bit master kernel */
>>>> +	ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
>>>> +	if (ret) {
>>>> +		pr_err("Failed to clear master kernel bits\n");
>>>> +		return ret;
>>>> +	}
>>>> +
>>>> +	if (ping_failed)
>>>> +		return ping_failed;
>>>> +
>>>> +	return 0;
>>>> +}
>>>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
>>>> +
>>>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
>>>> +{
>>>> +	int ret = -ENODEV;
>>>> +
>>>> +	q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
>>>> +	if (IS_ERR(q6v5->ping_state)) {
>>>> +		dev_err(&pdev->dev, "failed to acquire smem state %ld\n",
>>>> +			PTR_ERR(q6v5->ping_state));
>>>> +		return ret;
>>>> +	}
>>>> +
>>>> +	q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
>>>> +	if (q6v5->pong_irq < 0)
>>>> +		return q6v5->pong_irq;
>>>> +
>>>> +	ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
>>>> +					q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
>>>> +					"q6v5 pong", q6v5);
>>>> +	if (ret)
>>>> +		dev_err(&pdev->dev, "failed to acquire pong IRQ\n");
>>>> +
>>>> +	init_completion(&q6v5->ping_done);
>>>> +
>>>> +	return ret;
>>>> +}
>>>> +EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
>>>> +
>>>>  /**
>>>>   * qcom_q6v5_init() - initializer of the q6v5 common struct
>>>>   * @q6v5:	handle to be initialized
>>>> @@ -245,7 +328,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
>>>>   */
>>>>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>>>  		   struct rproc *rproc, int crash_reason, const char *load_state,
>>>> -		   void (*handover)(struct qcom_q6v5 *q6v5))
>>>> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5))
>>>>  {
>>>>  	int ret;
>>>>  
>>>> @@ -253,10 +336,14 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>>>  	q6v5->dev = &pdev->dev;
>>>>  	q6v5->crash_reason = crash_reason;
>>>>  	q6v5->handover = handover;
>>>> +	q6v5->early_boot = early_boot;
>>>>  
>>>>  	init_completion(&q6v5->start_done);
>>>>  	init_completion(&q6v5->stop_done);
>>>>  
>>>> +	if (early_boot)
>>>> +		init_completion(&q6v5->subsys_booted);
>>>> +
>>>>  	q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
>>>>  	if (q6v5->wdog_irq < 0)
>>>>  		return q6v5->wdog_irq;
>>>> diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
>>>> index 5a859c41896e..8a227bf70d7e 100644
>>>> --- a/drivers/remoteproc/qcom_q6v5.h
>>>> +++ b/drivers/remoteproc/qcom_q6v5.h
>>>> @@ -12,27 +12,35 @@ struct rproc;
>>>>  struct qcom_smem_state;
>>>>  struct qcom_sysmon;
>>>>  
>>>> +#define PING_TIMEOUT 500 /* in milliseconds */
>>>> +#define PING_TEST_WAIT 500 /* in milliseconds */
>>>> +
>>>>  struct qcom_q6v5 {
>>>>  	struct device *dev;
>>>>  	struct rproc *rproc;
>>>>  
>>>>  	struct qcom_smem_state *state;
>>>> +	struct qcom_smem_state *ping_state;
>>>>  	struct qmp *qmp;
>>>>  
>>>>  	struct icc_path *path;
>>>>  
>>>>  	unsigned stop_bit;
>>>> +	unsigned int ping_bit;
>>>>  
>>>>  	int wdog_irq;
>>>>  	int fatal_irq;
>>>>  	int ready_irq;
>>>>  	int handover_irq;
>>>>  	int stop_irq;
>>>> +	int pong_irq;
>>>>  
>>>>  	bool handover_issued;
>>>>  
>>>>  	struct completion start_done;
>>>>  	struct completion stop_done;
>>>> +	struct completion subsys_booted;
>>>> +	struct completion ping_done;
>>>>  
>>>>  	int crash_reason;
>>>>  
>>>> @@ -40,11 +48,13 @@ struct qcom_q6v5 {
>>>>  
>>>>  	const char *load_state;
>>>>  	void (*handover)(struct qcom_q6v5 *q6v5);
>>>> +
>>>> +	bool early_boot;
>>>>  };
>>>>  
>>>>  int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
>>>>  		   struct rproc *rproc, int crash_reason, const char *load_state,
>>>> -		   void (*handover)(struct qcom_q6v5 *q6v5));
>>>> +		   bool early_boot, void (*handover)(struct qcom_q6v5 *q6v5));
>>>>  void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
>>>>  
>>>>  int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
>>>> @@ -52,5 +62,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
>>>>  int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
>>>>  int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
>>>>  unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
>>>> +int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
>>>> +int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
>>>>  
>>>>  #endif
>>>> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c
>>>> index e98b7e03162c..1576b435b921 100644
>>>> --- a/drivers/remoteproc/qcom_q6v5_adsp.c
>>>> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c
>>>> @@ -717,7 +717,7 @@ static int adsp_probe(struct platform_device *pdev)
>>>>  		goto disable_pm;
>>>>  
>>>>  	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
>>>> -			     desc->load_state, qcom_adsp_pil_handover);
>>>> +			     desc->load_state, false, qcom_adsp_pil_handover);
>>>>  	if (ret)
>>>>  		goto disable_pm;
>>>>  
>>>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
>>>> index 0c0199fb0e68..04e577541c8f 100644
>>>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>>>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>>>> @@ -2156,7 +2156,7 @@ static int q6v5_probe(struct platform_device *pdev)
>>>>  	qproc->has_mba_logs = desc->has_mba_logs;
>>>>  
>>>>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem",
>>>> -			     qcom_msa_handover);
>>>> +			     false, qcom_msa_handover);
>>>>  	if (ret)
>>>>  		goto detach_proxy_pds;
>>>>  
>>>> diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
>>>> index 55a7da801183..99163e48a76a 100644
>>>> --- a/drivers/remoteproc/qcom_q6v5_pas.c
>>>> +++ b/drivers/remoteproc/qcom_q6v5_pas.c
>>>> @@ -35,6 +35,8 @@
>>>>  
>>>>  #define MAX_ASSIGN_COUNT 3
>>>>  
>>>> +#define EARLY_BOOT_RETRY_INTERVAL_MS 5000
>>>> +
>>>>  struct qcom_pas_data {
>>>>  	int crash_reason_smem;
>>>>  	const char *firmware_name;
>>>> @@ -58,6 +60,7 @@ struct qcom_pas_data {
>>>>  	int region_assign_count;
>>>>  	bool region_assign_shared;
>>>>  	int region_assign_vmid;
>>>> +	bool early_boot;
>>>>  };
>>>>  
>>>>  struct qcom_pas {
>>>> @@ -430,6 +433,51 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
>>>>  	return qcom_q6v5_panic(&pas->q6v5);
>>>>  }
>>>>  
>>>> +static int qcom_pas_attach(struct rproc *rproc)
>>>> +{
>>>> +	int ret;
>>>> +	struct qcom_pas *adsp = rproc->priv;
>>>> +	bool ready_state;
>>>> +	bool crash_state;
>>>> +
>>>> +	if (!adsp->q6v5.early_boot)
>>>> +		return -EINVAL;
>>>> +
>>>> +	ret = irq_get_irqchip_state(adsp->q6v5.fatal_irq,
>>>> +				    IRQCHIP_STATE_LINE_LEVEL, &crash_state);
>>>> +
>>>> +	if (crash_state) {
>>>> +		dev_err(adsp->dev, "Sub system has crashed before driver probe\n");
>>>> +		adsp->rproc->state = RPROC_CRASHED;
>>>> +		return -EINVAL;
>>>> +	}
>>>> +
>>>> +	ret = irq_get_irqchip_state(adsp->q6v5.ready_irq,
>>>> +				    IRQCHIP_STATE_LINE_LEVEL, &ready_state);
>>>> +
>>>> +	if (ready_state) {
>>>> +		dev_info(adsp->dev, "Sub system has boot-up before driver probe\n");
>>>> +		adsp->rproc->state = RPROC_DETACHED;
>>>> +	} else {
>>>> +		ret = wait_for_completion_timeout(&adsp->q6v5.subsys_booted,
>>>> +						  msecs_to_jiffies(EARLY_BOOT_RETRY_INTERVAL_MS));
>>>> +		if (!ret) {
>>>> +			dev_err(adsp->dev, "Timeout on waiting for subsystem interrupt\n");
>>>> +			return -ETIMEDOUT;
>>>> +		}
>>>> +	}
>>>> +
>>>> +	ret = qcom_q6v5_ping_subsystem(&adsp->q6v5);
>>>> +	if (ret) {
>>>> +		dev_err(adsp->dev, "Failed to ping subsystem, assuming device crashed\n");
>>>> +		rproc->state = RPROC_CRASHED;
>>>> +		return ret;
>>>> +	}
>>>> +
>>>> +	adsp->q6v5.running = true;
>>>> +	return ret;
>>>> +}
>>>> +
>>>>  static const struct rproc_ops qcom_pas_ops = {
>>>>  	.unprepare = qcom_pas_unprepare,
>>>>  	.start = qcom_pas_start,
>>>> @@ -438,6 +486,7 @@ static const struct rproc_ops qcom_pas_ops = {
>>>>  	.parse_fw = qcom_register_dump_segments,
>>>>  	.load = qcom_pas_load,
>>>>  	.panic = qcom_pas_panic,
>>>> +	.attach = qcom_pas_attach,
>>>>  };
>>>>  
>>>>  static const struct rproc_ops qcom_pas_minidump_ops = {
>>>> @@ -760,7 +809,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>>>  	pas->proxy_pd_count = ret;
>>>>  
>>>>  	ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem,
>>>> -			     desc->load_state, qcom_pas_handover);
>>>> +			     desc->load_state, desc->early_boot, qcom_pas_handover);
>>>>  	if (ret)
>>>>  		goto detach_proxy_pds;
>>>>  
>>>> @@ -774,6 +823,16 @@ static int qcom_pas_probe(struct platform_device *pdev)
>>>>  	}
>>>>  
>>>>  	qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name);
>>>> +
>>>> +	if (pas->q6v5.early_boot) {
>>>> +		ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
>>>> +		if (ret)
>>>> +			dev_err(&pdev->dev,
>>>> +				"Unable to find ping/pong bits, falling back to firmware load\n");
>>>> +		else
>>>> +			pas->rproc->state = RPROC_DETACHED;
>>>> +	}
>>>> +
>>>>  	ret = rproc_add(rproc);
>>>>  	if (ret)
>>>>  		goto remove_ssr_sysmon;
>>>>
>>>> -- 
>>>> 2.25.1
>>>>
>>>
>>
> 

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Dmitry Baryshkov]

On Mon, Sep 29, 2025 at 06:11:23PM +0800, Jingyi Wang wrote:
> 
> 
> On 9/29/2025 5:39 PM, Dmitry Baryshkov wrote:
> > On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
> >>
> >>
> >> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
> >>> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
> >>>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
> >>>> compatible with SM8750, which can fallback to SM8550 except for one more
> >>>> interrupt ("shutdown-ack").
> >>>>
> >>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >>>> ---
> >>>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
> >>>>  1 file changed, 5 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> index 2dd479cf4821..be9e2a0bc060 100644
> >>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>> @@ -28,7 +28,9 @@ properties:
> >>>>            - qcom,x1e80100-adsp-pas
> >>>>            - qcom,x1e80100-cdsp-pas
> >>>>        - items:
> >>>> -          - const: qcom,sm8750-adsp-pas
> >>>> +          - enum:
> >>>> +              - qcom,kaanapali-adsp-pas
> >>>> +              - qcom,sm8750-adsp-pas
> >>>>            - const: qcom,sm8550-adsp-pas
> >>>>        - items:
> >>>>            - const: qcom,sm8750-cdsp-pas
> >>>> @@ -95,6 +97,7 @@ allOf:
> >>>>          compatible:
> >>>>            contains:
> >>>>              enum:
> >>>> +              - qcom,kaanapali-adsp-pas
> >>>
> >>> This one and the next entry are redundant. Do you see why?
> >>>
> >>
> >> This one describe the interrupt:
> >>
> >>   - if:
> >>       properties:
> >>         compatible:
> >>           contains:
> > 
> >>             enum:
> >>               - qcom,kaanapali-adsp-pas
> >>               - qcom,sm8750-adsp-pas
> > 
> > It's still redundant. Don't you see it?
> > 
> 
> sorry I didn't get your point here, could you explain more?

For you device you have two compat strings, kaanapali and sm8750. This
schema block is covered by 'if compat contains sm8750', so you don't
need to add kaanapali to the if-case. You already hit this check thanks
to the fallback compat.

> 
> >>     then:
> >>       properties:
> >>         interrupts:
> >>           maxItems: 6
> >>         interrupt-names:
> >>           maxItems: 6
> >>         memory-region:
> >>           maxItems: 2
> >>
> >>
> >>>>                - qcom,sm8750-adsp-pas
> >>>>      then:
> >>>>        properties:
> >>>> @@ -185,6 +188,7 @@ allOf:
> >>>>          compatible:
> >>>>            contains:
> >>>>              enum:
> >>>> +              - qcom,kaanapali-adsp-pas
> >>
> >> This one describe the power domain
> >>
> >>   - if:
> >>       properties:
> >>         compatible:
> >>           contains:
> >>             enum:
> >>               - qcom,kaanapali-adsp-pas
> >>               - qcom,sm8550-adsp-pas
> >>               - qcom,sm8650-adsp-pas
> >>               - qcom,sm8750-adsp-pas
> >>               - qcom,x1e80100-adsp-pas
> > 
> > Likewise
> > 
> 
> indeed, here is redundant as "qcom,sm8550-adsp-pas" is added in
> the dts. I will remove this.
> 
> Thanks,
> Jingyi
> 
> >>     then:
> >>       properties:
> >>         power-domains:
> >>           items:
> >>             - description: LCX power domain
> >>             - description: LMX power domain
> >>         power-domain-names:
> >>           items:
> >>             - const: lcx
> >>             - const: lmx
> >>
> >>
> >>>>                - qcom,sm8550-adsp-pas
> >>>>                - qcom,sm8650-adsp-pas
> >>>>                - qcom,sm8750-adsp-pas
> >>>>
> >>>> -- 
> >>>> 2.25.1
> >>>>
> >>>
> >>
> >> Thanks,
> >> Jingyi
> > 
> 

-- 
With best wishes
Dmitry

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Jingyi Wang]

On 9/29/2025 8:22 PM, Dmitry Baryshkov wrote:
> On Mon, Sep 29, 2025 at 06:11:23PM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/29/2025 5:39 PM, Dmitry Baryshkov wrote:
>>> On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
>>>>
>>>>
>>>> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
>>>>> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
>>>>>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
>>>>>> compatible with SM8750, which can fallback to SM8550 except for one more
>>>>>> interrupt ("shutdown-ack").
>>>>>>
>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>> ---
>>>>>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
>>>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> index 2dd479cf4821..be9e2a0bc060 100644
>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> @@ -28,7 +28,9 @@ properties:
>>>>>>            - qcom,x1e80100-adsp-pas
>>>>>>            - qcom,x1e80100-cdsp-pas
>>>>>>        - items:
>>>>>> -          - const: qcom,sm8750-adsp-pas
>>>>>> +          - enum:
>>>>>> +              - qcom,kaanapali-adsp-pas
>>>>>> +              - qcom,sm8750-adsp-pas
>>>>>>            - const: qcom,sm8550-adsp-pas
>>>>>>        - items:
>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>> @@ -95,6 +97,7 @@ allOf:
>>>>>>          compatible:
>>>>>>            contains:
>>>>>>              enum:
>>>>>> +              - qcom,kaanapali-adsp-pas
>>>>>
>>>>> This one and the next entry are redundant. Do you see why?
>>>>>
>>>>
>>>> This one describe the interrupt:
>>>>
>>>>   - if:
>>>>       properties:
>>>>         compatible:
>>>>           contains:
>>>
>>>>             enum:
>>>>               - qcom,kaanapali-adsp-pas
>>>>               - qcom,sm8750-adsp-pas
>>>
>>> It's still redundant. Don't you see it?
>>>
>>
>> sorry I didn't get your point here, could you explain more?
> 
> For you device you have two compat strings, kaanapali and sm8750. This
> schema block is covered by 'if compat contains sm8750', so you don't
> need to add kaanapali to the if-case. You already hit this check thanks
> to the fallback compat.
> 

Hi Dimitry,

our device contains sm8550, not sm8750.

Thanks,
Jingyi

>>
>>>>     then:
>>>>       properties:
>>>>         interrupts:
>>>>           maxItems: 6
>>>>         interrupt-names:
>>>>           maxItems: 6
>>>>         memory-region:
>>>>           maxItems: 2
>>>>
>>>>
>>>>>>                - qcom,sm8750-adsp-pas
>>>>>>      then:
>>>>>>        properties:
>>>>>> @@ -185,6 +188,7 @@ allOf:
>>>>>>          compatible:
>>>>>>            contains:
>>>>>>              enum:
>>>>>> +              - qcom,kaanapali-adsp-pas
>>>>
>>>> This one describe the power domain
>>>>
>>>>   - if:
>>>>       properties:
>>>>         compatible:
>>>>           contains:
>>>>             enum:
>>>>               - qcom,kaanapali-adsp-pas
>>>>               - qcom,sm8550-adsp-pas
>>>>               - qcom,sm8650-adsp-pas
>>>>               - qcom,sm8750-adsp-pas
>>>>               - qcom,x1e80100-adsp-pas
>>>
>>> Likewise
>>>
>>
>> indeed, here is redundant as "qcom,sm8550-adsp-pas" is added in
>> the dts. I will remove this.
>>
>> Thanks,
>> Jingyi
>>
>>>>     then:
>>>>       properties:
>>>>         power-domains:
>>>>           items:
>>>>             - description: LCX power domain
>>>>             - description: LMX power domain
>>>>         power-domain-names:
>>>>           items:
>>>>             - const: lcx
>>>>             - const: lmx
>>>>
>>>>
>>>>>>                - qcom,sm8550-adsp-pas
>>>>>>                - qcom,sm8650-adsp-pas
>>>>>>                - qcom,sm8750-adsp-pas
>>>>>>
>>>>>> -- 
>>>>>> 2.25.1
>>>>>>
>>>>>
>>>>
>>>> Thanks,
>>>> Jingyi
>>>
>>
> 

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Dmitry Baryshkov]

On Tue, Sep 30, 2025 at 10:12:27AM +0800, Jingyi Wang wrote:
> 
> 
> On 9/29/2025 8:22 PM, Dmitry Baryshkov wrote:
> > On Mon, Sep 29, 2025 at 06:11:23PM +0800, Jingyi Wang wrote:
> >>
> >>
> >> On 9/29/2025 5:39 PM, Dmitry Baryshkov wrote:
> >>> On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
> >>>>
> >>>>
> >>>> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
> >>>>> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
> >>>>>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
> >>>>>> compatible with SM8750, which can fallback to SM8550 except for one more
> >>>>>> interrupt ("shutdown-ack").
> >>>>>>
> >>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> >>>>>> ---
> >>>>>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
> >>>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
> >>>>>>
> >>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>>>> index 2dd479cf4821..be9e2a0bc060 100644
> >>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> >>>>>> @@ -28,7 +28,9 @@ properties:
> >>>>>>            - qcom,x1e80100-adsp-pas
> >>>>>>            - qcom,x1e80100-cdsp-pas
> >>>>>>        - items:
> >>>>>> -          - const: qcom,sm8750-adsp-pas
> >>>>>> +          - enum:
> >>>>>> +              - qcom,kaanapali-adsp-pas
> >>>>>> +              - qcom,sm8750-adsp-pas
> >>>>>>            - const: qcom,sm8550-adsp-pas
> >>>>>>        - items:
> >>>>>>            - const: qcom,sm8750-cdsp-pas
> >>>>>> @@ -95,6 +97,7 @@ allOf:
> >>>>>>          compatible:
> >>>>>>            contains:
> >>>>>>              enum:
> >>>>>> +              - qcom,kaanapali-adsp-pas
> >>>>>
> >>>>> This one and the next entry are redundant. Do you see why?
> >>>>>
> >>>>
> >>>> This one describe the interrupt:
> >>>>
> >>>>   - if:
> >>>>       properties:
> >>>>         compatible:
> >>>>           contains:
> >>>
> >>>>             enum:
> >>>>               - qcom,kaanapali-adsp-pas
> >>>>               - qcom,sm8750-adsp-pas
> >>>
> >>> It's still redundant. Don't you see it?
> >>>
> >>
> >> sorry I didn't get your point here, could you explain more?
> > 
> > For you device you have two compat strings, kaanapali and sm8750. This
> > schema block is covered by 'if compat contains sm8750', so you don't
> > need to add kaanapali to the if-case. You already hit this check thanks
> > to the fallback compat.
> > 
> 
> Hi Dimitry,
> 
> our device contains sm8550, not sm8750.

I should be reading the patches more carefully. I beg your pardon,
indeed, you were right.

-- 
With best wishes
Dmitry

Re: [PATCH 1/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali ADSP

[Jingyi Wang]

On 9/30/2025 10:16 AM, Dmitry Baryshkov wrote:
> On Tue, Sep 30, 2025 at 10:12:27AM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/29/2025 8:22 PM, Dmitry Baryshkov wrote:
>>> On Mon, Sep 29, 2025 at 06:11:23PM +0800, Jingyi Wang wrote:
>>>>
>>>>
>>>> On 9/29/2025 5:39 PM, Dmitry Baryshkov wrote:
>>>>> On Mon, Sep 29, 2025 at 02:06:11PM +0800, Jingyi Wang wrote:
>>>>>>
>>>>>>
>>>>>> On 9/25/2025 10:19 AM, Dmitry Baryshkov wrote:
>>>>>>> On Wed, Sep 24, 2025 at 04:37:22PM -0700, Jingyi Wang wrote:
>>>>>>>> Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
>>>>>>>> compatible with SM8750, which can fallback to SM8550 except for one more
>>>>>>>> interrupt ("shutdown-ack").
>>>>>>>>
>>>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>>>> ---
>>>>>>>>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 6 +++++-
>>>>>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>>>>>
>>>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> index 2dd479cf4821..be9e2a0bc060 100644
>>>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> @@ -28,7 +28,9 @@ properties:
>>>>>>>>            - qcom,x1e80100-adsp-pas
>>>>>>>>            - qcom,x1e80100-cdsp-pas
>>>>>>>>        - items:
>>>>>>>> -          - const: qcom,sm8750-adsp-pas
>>>>>>>> +          - enum:
>>>>>>>> +              - qcom,kaanapali-adsp-pas
>>>>>>>> +              - qcom,sm8750-adsp-pas
>>>>>>>>            - const: qcom,sm8550-adsp-pas
>>>>>>>>        - items:
>>>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>>> @@ -95,6 +97,7 @@ allOf:
>>>>>>>>          compatible:
>>>>>>>>            contains:
>>>>>>>>              enum:
>>>>>>>> +              - qcom,kaanapali-adsp-pas
>>>>>>>
>>>>>>> This one and the next entry are redundant. Do you see why?
>>>>>>>
>>>>>>
>>>>>> This one describe the interrupt:
>>>>>>
>>>>>>   - if:
>>>>>>       properties:
>>>>>>         compatible:
>>>>>>           contains:
>>>>>
>>>>>>             enum:
>>>>>>               - qcom,kaanapali-adsp-pas
>>>>>>               - qcom,sm8750-adsp-pas
>>>>>
>>>>> It's still redundant. Don't you see it?
>>>>>
>>>>
>>>> sorry I didn't get your point here, could you explain more?
>>>
>>> For you device you have two compat strings, kaanapali and sm8750. This
>>> schema block is covered by 'if compat contains sm8750', so you don't
>>> need to add kaanapali to the if-case. You already hit this check thanks
>>> to the fallback compat.
>>>
>>
>> Hi Dimitry,
>>
>> our device contains sm8550, not sm8750.
> 
> I should be reading the patches more carefully. I beg your pardon,
> indeed, you were right.
> 

No worries at all, appreciate for your review and clarification.

Thanks,
Jingyi

Re: [PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Krzysztof Kozlowski]

On 25/09/2025 08:37, Jingyi Wang wrote:
> +
> +  glink-edge:
> +    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
> +    unevaluatedProperties: false
> +    description: |

Drop |


> +      Qualcomm G-Link subnode which represents communication edge, channels
> +      and devices related to the Remoteproc.
> +
> +required:
> +  - compatible
> +  - reg
> +  - memory-region
> +  - clocks
> +  - clock-names
> +  - interrupts
> +  - interrupt-names
> +  - qcom,smem-states
> +  - qcom,smem-state-names
> +
> +unevaluatedProperties: false

That's wrong in this context. But if you add missing (and corrected
pas-common) then it would make sense.


Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Krzysztof Kozlowski]

On 29/09/2025 19:03, Dmitry Baryshkov wrote:
> On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
>>
>>
>> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
>>> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>>>
>>>>
>>>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>>>
>>>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>>>> interrupt.
>>>>>>
>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>> ---
>>>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>>>  1 file changed, 19 insertions(+)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>> @@ -35,6 +35,9 @@ properties:
>>>>>>        - items:
>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>            - const: qcom,sm8650-cdsp-pas
>>>>>> +      - items:
>>>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>>>> +          - const: qcom,sm8550-cdsp-pas
>>>>>
>>>>>
>>>>> This time maybe without HTML:
>>>>>
>>>>> This looks wrong. This is not compatible with SM8550.
>>>>
>>>> Could you point out what is the difference from your perspecetive?
>>>> it is the same as SM8550 except for there is one more interrupt,
>>>> which is also described in this patch.
>>>
>>> I'd second Krzysztof here. Your description points out that it is _not_
>>> compatible to SM8550.
>>>
>>
>> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
>> difference in interrupt:
>> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/
> 
> Interesting. Let's wait for Krzysztof's response then.
> 


Because it is evolution of sm8750, so it did not go back to old design.
from three generations ago. This is compatible with sm8750 or with sm8650.


Best regards,
Krzysztof

Re: [PATCH 3/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali MPSS

[Krzysztof Kozlowski]

On 25/09/2025 08:37, Jingyi Wang wrote:
> Document compatible for Qualcomm Kaanapali SoC MPSS PAS which looks fully
> compatible with SM8750.
> 
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> index 031fdf36a66c..b0d2f0371e5e 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
> @@ -38,6 +38,9 @@ properties:
>        - items:
>            - const: qcom,kaanapali-cdsp-pas
>            - const: qcom,sm8550-cdsp-pas
> +      - items:
> +          - const: qcom,kaanapali-mpss-pas
> +          - const: qcom,sm8750-mpss-pas
>  
... and look, here it is compatible with sm8750 like expected. But for
CDSP you claim it is not compatible with previous generation but went
back to three generations ago, all this without any explanation in
commit msg.

Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 10/9/2025 6:29 PM, Krzysztof Kozlowski wrote:
> On 29/09/2025 19:03, Dmitry Baryshkov wrote:
>> On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
>>>
>>>
>>> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
>>>> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>>>>
>>>>>
>>>>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>>>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>>>>
>>>>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>>>>> interrupt.
>>>>>>>
>>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>>> ---
>>>>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>>>>  1 file changed, 19 insertions(+)
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> @@ -35,6 +35,9 @@ properties:
>>>>>>>        - items:
>>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>>            - const: qcom,sm8650-cdsp-pas
>>>>>>> +      - items:
>>>>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>>>>> +          - const: qcom,sm8550-cdsp-pas
>>>>>>
>>>>>>
>>>>>> This time maybe without HTML:
>>>>>>
>>>>>> This looks wrong. This is not compatible with SM8550.
>>>>>
>>>>> Could you point out what is the difference from your perspecetive?
>>>>> it is the same as SM8550 except for there is one more interrupt,
>>>>> which is also described in this patch.
>>>>
>>>> I'd second Krzysztof here. Your description points out that it is _not_
>>>> compatible to SM8550.
>>>>
>>>
>>> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
>>> difference in interrupt:
>>> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/
>>
>> Interesting. Let's wait for Krzysztof's response then.
>>
> 
> 
> Because it is evolution of sm8750, so it did not go back to old design.
> from three generations ago. This is compatible with sm8750 or with sm8650.
> 
> 
> Best regards,
> Krzysztof

sure, will fix in next version.

Thanks,
Jingyi

Re: [PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Jingyi Wang]

On 10/9/2025 6:27 PM, Krzysztof Kozlowski wrote:
> On 25/09/2025 08:37, Jingyi Wang wrote:
>> +
>> +  glink-edge:
>> +    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
>> +    unevaluatedProperties: false
>> +    description: |
> 
> Drop |
> 
> 

Will fix

>> +      Qualcomm G-Link subnode which represents communication edge, channels
>> +      and devices related to the Remoteproc.
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - memory-region
>> +  - clocks
>> +  - clock-names
>> +  - interrupts
>> +  - interrupt-names
>> +  - qcom,smem-states
>> +  - qcom,smem-state-names
>> +
>> +unevaluatedProperties: false
> 
> That's wrong in this context. But if you add missing (and corrected
> pas-common) then it would make sense.
> 

Sorry I didn't get this point, could you make it more clear?

The property for Kaanapali SoCCP doesn't follow qcom,pas-common.yaml
(the interrupts are different) so it was not included here, like
"qcom,qcs404-cdsp-pil.yaml"

So I think just adding the missing "power-domains","power-domain-names"
under "required" will be okay?

Thanks,
Jingyi

> 
> Best regards,
> Krzysztof

Re: [PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Krzysztof Kozlowski]

On 14/10/2025 06:28, Jingyi Wang wrote:
> 
> 
> On 10/9/2025 6:27 PM, Krzysztof Kozlowski wrote:
>> On 25/09/2025 08:37, Jingyi Wang wrote:
>>> +
>>> +  glink-edge:
>>> +    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
>>> +    unevaluatedProperties: false
>>> +    description: |
>>
>> Drop |
>>
>>
> 
> Will fix
> 
>>> +      Qualcomm G-Link subnode which represents communication edge, channels
>>> +      and devices related to the Remoteproc.
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +  - memory-region
>>> +  - clocks
>>> +  - clock-names
>>> +  - interrupts
>>> +  - interrupt-names
>>> +  - qcom,smem-states
>>> +  - qcom,smem-state-names
>>> +
>>> +unevaluatedProperties: false
>>
>> That's wrong in this context. But if you add missing (and corrected
>> pas-common) then it would make sense.
>>
> 
> Sorry I didn't get this point, could you make it more clear?
> 
> The property for Kaanapali SoCCP doesn't follow qcom,pas-common.yaml
> (the interrupts are different) so it was not included here, like
> "qcom,qcs404-cdsp-pil.yaml"


It should follow. We want the common properties to be common. You cannot
have new binding not using common properties, because you duplicate
property definition.

> 
> So I think just adding the missing "power-domains","power-domain-names"
> under "required" will be okay?


You need to adjust pas-common.yaml, all other bindings and this binding
so there is a common part.

Best regards,
Krzysztof

Re: [PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Jingyi Wang]

On 10/14/2025 12:47 PM, Krzysztof Kozlowski wrote:
> On 14/10/2025 06:28, Jingyi Wang wrote:
>>
>>
>> On 10/9/2025 6:27 PM, Krzysztof Kozlowski wrote:
>>> On 25/09/2025 08:37, Jingyi Wang wrote:
>>>> +
>>>> +  glink-edge:
>>>> +    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
>>>> +    unevaluatedProperties: false
>>>> +    description: |
>>>
>>> Drop |
>>>
>>>
>>
>> Will fix
>>
>>>> +      Qualcomm G-Link subnode which represents communication edge, channels
>>>> +      and devices related to the Remoteproc.
>>>> +
>>>> +required:
>>>> +  - compatible
>>>> +  - reg
>>>> +  - memory-region
>>>> +  - clocks
>>>> +  - clock-names
>>>> +  - interrupts
>>>> +  - interrupt-names
>>>> +  - qcom,smem-states
>>>> +  - qcom,smem-state-names
>>>> +
>>>> +unevaluatedProperties: false
>>>
>>> That's wrong in this context. But if you add missing (and corrected
>>> pas-common) then it would make sense.
>>>
>>
>> Sorry I didn't get this point, could you make it more clear?
>>
>> The property for Kaanapali SoCCP doesn't follow qcom,pas-common.yaml
>> (the interrupts are different) so it was not included here, like
>> "qcom,qcs404-cdsp-pil.yaml"
> 
> 
> It should follow. We want the common properties to be common. You cannot
> have new binding not using common properties, because you duplicate
> property definition.
> 
>>
>> So I think just adding the missing "power-domains","power-domain-names"
>> under "required" will be okay?
> 
> 
> You need to adjust pas-common.yaml, all other bindings and this binding
> so there is a common part.
> 

Do you mean remove the interrupts property from the pas-common.yaml then
define it in separate bindings?

Thanks,
Jingyi

> Best regards,
> Krzysztof

Re: [PATCH 4/6] dt-bindings: remoteproc: qcom,pas: Document pas for Kaanapali SoCCP

[Krzysztof Kozlowski]

On 14/10/2025 07:30, Jingyi Wang wrote:
> 
> 
> On 10/14/2025 12:47 PM, Krzysztof Kozlowski wrote:
>> On 14/10/2025 06:28, Jingyi Wang wrote:
>>>
>>>
>>> On 10/9/2025 6:27 PM, Krzysztof Kozlowski wrote:
>>>> On 25/09/2025 08:37, Jingyi Wang wrote:
>>>>> +
>>>>> +  glink-edge:
>>>>> +    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
>>>>> +    unevaluatedProperties: false
>>>>> +    description: |
>>>>
>>>> Drop |
>>>>
>>>>
>>>
>>> Will fix
>>>
>>>>> +      Qualcomm G-Link subnode which represents communication edge, channels
>>>>> +      and devices related to the Remoteproc.
>>>>> +
>>>>> +required:
>>>>> +  - compatible
>>>>> +  - reg
>>>>> +  - memory-region
>>>>> +  - clocks
>>>>> +  - clock-names
>>>>> +  - interrupts
>>>>> +  - interrupt-names
>>>>> +  - qcom,smem-states
>>>>> +  - qcom,smem-state-names
>>>>> +
>>>>> +unevaluatedProperties: false
>>>>
>>>> That's wrong in this context. But if you add missing (and corrected
>>>> pas-common) then it would make sense.
>>>>
>>>
>>> Sorry I didn't get this point, could you make it more clear?
>>>
>>> The property for Kaanapali SoCCP doesn't follow qcom,pas-common.yaml
>>> (the interrupts are different) so it was not included here, like
>>> "qcom,qcs404-cdsp-pil.yaml"
>>
>>
>> It should follow. We want the common properties to be common. You cannot
>> have new binding not using common properties, because you duplicate
>> property definition.
>>
>>>
>>> So I think just adding the missing "power-domains","power-domain-names"
>>> under "required" will be okay?
>>
>>
>> You need to adjust pas-common.yaml, all other bindings and this binding
>> so there is a common part.
>>
> 
> Do you mean remove the interrupts property from the pas-common.yaml then
> define it in separate bindings?

They should rather stay in pas-common and be extended to oneOf for two
versions - old and Kaanapali one.

Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 10/9/2025 6:29 PM, Krzysztof Kozlowski wrote:
> On 29/09/2025 19:03, Dmitry Baryshkov wrote:
>> On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
>>>
>>>
>>> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
>>>> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>>>>
>>>>>
>>>>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>>>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>>>>
>>>>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>>>>> interrupt.
>>>>>>>
>>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>>> ---
>>>>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>>>>  1 file changed, 19 insertions(+)
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>> @@ -35,6 +35,9 @@ properties:
>>>>>>>        - items:
>>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>>            - const: qcom,sm8650-cdsp-pas
>>>>>>> +      - items:
>>>>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>>>>> +          - const: qcom,sm8550-cdsp-pas
>>>>>>
>>>>>>
>>>>>> This time maybe without HTML:
>>>>>>
>>>>>> This looks wrong. This is not compatible with SM8550.
>>>>>
>>>>> Could you point out what is the difference from your perspecetive?
>>>>> it is the same as SM8550 except for there is one more interrupt,
>>>>> which is also described in this patch.
>>>>
>>>> I'd second Krzysztof here. Your description points out that it is _not_
>>>> compatible to SM8550.
>>>>
>>>
>>> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
>>> difference in interrupt:
>>> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/
>>
>> Interesting. Let's wait for Krzysztof's response then.
>>
> 
> 
> Because it is evolution of sm8750, so it did not go back to old design.
> from three generations ago. This is compatible with sm8750 or with sm8650.
> 
> 
> Best regards,
> Krzysztof

Hi Krzysztof，

I tested with falling back to sm8650 cdsp but it will fail with:
[    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0

sm8550 and kaanapali define 2 memory regions: 
"memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"

sm8650 and sm8750 define 3 memory regions:
"memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
with the driver:

static const struct qcom_pas_data sm8650_cdsp_resource = {
        .crash_reason_smem = 601,
        .firmware_name = "cdsp.mdt",
        .dtb_firmware_name = "cdsp_dtb.mdt",
         <...>
        .region_assign_idx = 2,
        .region_assign_count = 1,
        .region_assign_shared = true,
        .region_assign_vmid = QCOM_SCM_VMID_CDSP,
};

When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.

So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
in the driver?

Thanks,
Jingyi

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Krzysztof Kozlowski]

On 23/10/2025 06:07, Jingyi Wang wrote:
> 
> 
> On 10/9/2025 6:29 PM, Krzysztof Kozlowski wrote:
>> On 29/09/2025 19:03, Dmitry Baryshkov wrote:
>>> On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
>>>>
>>>>
>>>> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
>>>>> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>>>>>
>>>>>>
>>>>>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>>>>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>>>>>
>>>>>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>>>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>>>>>> interrupt.
>>>>>>>>
>>>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>>>> ---
>>>>>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>>>>>  1 file changed, 19 insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>> @@ -35,6 +35,9 @@ properties:
>>>>>>>>        - items:
>>>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>>>            - const: qcom,sm8650-cdsp-pas
>>>>>>>> +      - items:
>>>>>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>>>>>> +          - const: qcom,sm8550-cdsp-pas
>>>>>>>
>>>>>>>
>>>>>>> This time maybe without HTML:
>>>>>>>
>>>>>>> This looks wrong. This is not compatible with SM8550.
>>>>>>
>>>>>> Could you point out what is the difference from your perspecetive?
>>>>>> it is the same as SM8550 except for there is one more interrupt,
>>>>>> which is also described in this patch.
>>>>>
>>>>> I'd second Krzysztof here. Your description points out that it is _not_
>>>>> compatible to SM8550.
>>>>>
>>>>
>>>> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
>>>> difference in interrupt:
>>>> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/
>>>
>>> Interesting. Let's wait for Krzysztof's response then.
>>>
>>
>>
>> Because it is evolution of sm8750, so it did not go back to old design.
>> from three generations ago. This is compatible with sm8750 or with sm8650.
>>
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof，
> 
> I tested with falling back to sm8650 cdsp but it will fail with:
> [    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0
> 
> sm8550 and kaanapali define 2 memory regions: 
> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"
> 
> sm8650 and sm8750 define 3 memory regions:
> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
> with the driver:
> 
> static const struct qcom_pas_data sm8650_cdsp_resource = {
>         .crash_reason_smem = 601,
>         .firmware_name = "cdsp.mdt",
>         .dtb_firmware_name = "cdsp_dtb.mdt",
>          <...>
>         .region_assign_idx = 2,
>         .region_assign_count = 1,
>         .region_assign_shared = true,
>         .region_assign_vmid = QCOM_SCM_VMID_CDSP,
> };
> 
> When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.
> 
> So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
> in the driver?

And partially the point here is that you might need the third region, no?
Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 10/23/2025 2:28 PM, Krzysztof Kozlowski wrote:
> On 23/10/2025 06:07, Jingyi Wang wrote:
>>
>>
>> On 10/9/2025 6:29 PM, Krzysztof Kozlowski wrote:
>>> On 29/09/2025 19:03, Dmitry Baryshkov wrote:
>>>> On Mon, Sep 29, 2025 at 05:41:10PM +0800, Jingyi Wang wrote:
>>>>>
>>>>>
>>>>> On 9/29/2025 5:34 PM, Dmitry Baryshkov wrote:
>>>>>> On Mon, Sep 29, 2025 at 02:20:54PM +0800, Jingyi Wang wrote:
>>>>>>>
>>>>>>>
>>>>>>> On 9/25/2025 9:48 AM, Krzysztof Kozłowski wrote:
>>>>>>>> On Thu, 25 Sept 2025 at 08:37, Jingyi Wang <jingyi.wang@oss.qualcomm.com> wrote:
>>>>>>>>>
>>>>>>>>> Add remote processor PAS loader for Kaanapali CDSP processor, compatible
>>>>>>>>> with earlier SM8550 with minor difference: one more sixth "shutdown-ack"
>>>>>>>>> interrupt.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>>>>>>>>> ---
>>>>>>>>>  .../bindings/remoteproc/qcom,sm8550-pas.yaml          | 19 +++++++++++++++++++
>>>>>>>>>  1 file changed, 19 insertions(+)
>>>>>>>>>
>>>>>>>>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>>> index be9e2a0bc060..031fdf36a66c 100644
>>>>>>>>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
>>>>>>>>> @@ -35,6 +35,9 @@ properties:
>>>>>>>>>        - items:
>>>>>>>>>            - const: qcom,sm8750-cdsp-pas
>>>>>>>>>            - const: qcom,sm8650-cdsp-pas
>>>>>>>>> +      - items:
>>>>>>>>> +          - const: qcom,kaanapali-cdsp-pas
>>>>>>>>> +          - const: qcom,sm8550-cdsp-pas
>>>>>>>>
>>>>>>>>
>>>>>>>> This time maybe without HTML:
>>>>>>>>
>>>>>>>> This looks wrong. This is not compatible with SM8550.
>>>>>>>
>>>>>>> Could you point out what is the difference from your perspecetive?
>>>>>>> it is the same as SM8550 except for there is one more interrupt,
>>>>>>> which is also described in this patch.
>>>>>>
>>>>>> I'd second Krzysztof here. Your description points out that it is _not_
>>>>>> compatible to SM8550.
>>>>>>
>>>>>
>>>>> Here is the binding for sm8750 cdsp. Fallback to sm8650 but describe the
>>>>> difference in interrupt:
>>>>> https://lore.kernel.org/all/20250221160036.159557-1-krzysztof.kozlowski@linaro.org/
>>>>
>>>> Interesting. Let's wait for Krzysztof's response then.
>>>>
>>>
>>>
>>> Because it is evolution of sm8750, so it did not go back to old design.
>>> from three generations ago. This is compatible with sm8750 or with sm8650.
>>>
>>>
>>> Best regards,
>>> Krzysztof
>>
>> Hi Krzysztof，
>>
>> I tested with falling back to sm8650 cdsp but it will fail with:
>> [    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0
>>
>> sm8550 and kaanapali define 2 memory regions: 
>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"
>>
>> sm8650 and sm8750 define 3 memory regions:
>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
>> with the driver:
>>
>> static const struct qcom_pas_data sm8650_cdsp_resource = {
>>         .crash_reason_smem = 601,
>>         .firmware_name = "cdsp.mdt",
>>         .dtb_firmware_name = "cdsp_dtb.mdt",
>>          <...>
>>         .region_assign_idx = 2,
>>         .region_assign_count = 1,
>>         .region_assign_shared = true,
>>         .region_assign_vmid = QCOM_SCM_VMID_CDSP,
>> };
>>
>> When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.
>>
>> So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
>> in the driver?
> 
> And partially the point here is that you might need the third region, no?
> Best regards,
> Krzysztof

On kaanapali, the global_sync_mem region is not managed by kernel, so it should
be removed.

Thanks,
Jingyi

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Krzysztof Kozlowski]

On 24/10/2025 04:10, Jingyi Wang wrote:
>>>
>>> Hi Krzysztof，
>>>
>>> I tested with falling back to sm8650 cdsp but it will fail with:
>>> [    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0
>>>
>>> sm8550 and kaanapali define 2 memory regions: 
>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"
>>>
>>> sm8650 and sm8750 define 3 memory regions:
>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
>>> with the driver:
>>>
>>> static const struct qcom_pas_data sm8650_cdsp_resource = {
>>>         .crash_reason_smem = 601,
>>>         .firmware_name = "cdsp.mdt",
>>>         .dtb_firmware_name = "cdsp_dtb.mdt",
>>>          <...>
>>>         .region_assign_idx = 2,
>>>         .region_assign_count = 1,
>>>         .region_assign_shared = true,
>>>         .region_assign_vmid = QCOM_SCM_VMID_CDSP,
>>> };
>>>
>>> When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.
>>>
>>> So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
>>> in the driver?
>>
>> And partially the point here is that you might need the third region, no?
>> Best regards,
>> Krzysztof
> 
> On kaanapali, the global_sync_mem region is not managed by kernel, so it should
> be removed.


OK, then please mention this in the commit msg, so it is clear why this
is not compatible with previous generation.

Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Jingyi Wang]

On 10/24/2025 3:28 PM, Krzysztof Kozlowski wrote:
> On 24/10/2025 04:10, Jingyi Wang wrote:
>>>>
>>>> Hi Krzysztof，
>>>>
>>>> I tested with falling back to sm8650 cdsp but it will fail with:
>>>> [    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0
>>>>
>>>> sm8550 and kaanapali define 2 memory regions: 
>>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"
>>>>
>>>> sm8650 and sm8750 define 3 memory regions:
>>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
>>>> with the driver:
>>>>
>>>> static const struct qcom_pas_data sm8650_cdsp_resource = {
>>>>         .crash_reason_smem = 601,
>>>>         .firmware_name = "cdsp.mdt",
>>>>         .dtb_firmware_name = "cdsp_dtb.mdt",
>>>>          <...>
>>>>         .region_assign_idx = 2,
>>>>         .region_assign_count = 1,
>>>>         .region_assign_shared = true,
>>>>         .region_assign_vmid = QCOM_SCM_VMID_CDSP,
>>>> };
>>>>
>>>> When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.
>>>>
>>>> So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
>>>> in the driver?
>>>
>>> And partially the point here is that you might need the third region, no?
>>> Best regards,
>>> Krzysztof
>>
>> On kaanapali, the global_sync_mem region is not managed by kernel, so it should
>> be removed.
> 
> 
> OK, then please mention this in the commit msg, so it is clear why this
> is not compatible with previous generation.
> 
> Best regards,
> Krzysztof

Sorry for being a bit verbose, but I would like to make it clear that we can still
use this fallback if we clarify it in the commit message, right?

Thanks,
Jingyi

Re: [PATCH 2/6] dt-bindings: remoteproc: qcom,sm8550-pas: Add Kaanapali CDSP

[Krzysztof Kozlowski]

On 24/10/2025 09:42, Jingyi Wang wrote:
> 
> 
> On 10/24/2025 3:28 PM, Krzysztof Kozlowski wrote:
>> On 24/10/2025 04:10, Jingyi Wang wrote:
>>>>>
>>>>> Hi Krzysztof，
>>>>>
>>>>> I tested with falling back to sm8650 cdsp but it will fail with:
>>>>> [    4.739615] qcom_q6v5_pas 26300000.remoteproc: unable to resolve shareable memory-region index 0
>>>>>
>>>>> sm8550 and kaanapali define 2 memory regions: 
>>>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;"
>>>>>
>>>>> sm8650 and sm8750 define 3 memory regions:
>>>>> "memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;"
>>>>> with the driver:
>>>>>
>>>>> static const struct qcom_pas_data sm8650_cdsp_resource = {
>>>>>         .crash_reason_smem = 601,
>>>>>         .firmware_name = "cdsp.mdt",
>>>>>         .dtb_firmware_name = "cdsp_dtb.mdt",
>>>>>          <...>
>>>>>         .region_assign_idx = 2,
>>>>>         .region_assign_count = 1,
>>>>>         .region_assign_shared = true,
>>>>>         .region_assign_vmid = QCOM_SCM_VMID_CDSP,
>>>>> };
>>>>>
>>>>> When kaanapali fallback to sm8650 it cannot parse this region_assign_idx.
>>>>>
>>>>> So shall we still fallback to sm8550 or define a new node "kaanapali_cdsp_resource"
>>>>> in the driver?
>>>>
>>>> And partially the point here is that you might need the third region, no?
>>>> Best regards,
>>>> Krzysztof
>>>
>>> On kaanapali, the global_sync_mem region is not managed by kernel, so it should
>>> be removed.
>>
>>
>> OK, then please mention this in the commit msg, so it is clear why this
>> is not compatible with previous generation.
>>
>> Best regards,
>> Krzysztof
> 
> Sorry for being a bit verbose, but I would like to make it clear that we can still
> use this fallback if we clarify it in the commit message, right?


Yes, you can.

Best regards,
Krzysztof