From: <Conor.Dooley@microchip.com>
To: <prabhakar.csengg@gmail.com>
Cc: <geert+renesas@glider.be>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <heiko@sntech.de>,
<atishp@rivosinc.com>, <devicetree@vger.kernel.org>,
<linux-riscv@lists.infradead.org>,
<linux-renesas-soc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <biju.das.jz@bp.renesas.com>,
<prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v3 08/10] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
Date: Thu, 15 Sep 2022 22:44:33 +0000 [thread overview]
Message-ID: <cdd42171-872c-cb6d-e540-240b233b74fc@microchip.com> (raw)
In-Reply-To: <CA+V-a8tWaKPNmNjJY6sX1yyUz1V5S7JXP+Eenxo4jOtu7uXXLQ@mail.gmail.com>
On 15/09/2022 23:41, Lad, Prabhakar wrote:
> Hi Conor,
>
> Thank you for the review.
>
> On Thu, Sep 15, 2022 at 10:56 PM <Conor.Dooley@microchip.com> wrote:
>>
>> On 15/09/2022 19:15, Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>>
>>> Enable the minimal blocks required for booting the Renesas RZ/Five
>>> SMARC EVK with initramfs.
>>>
>>> Below are the blocks enabled:
>>> - CPG
>>> - CPU0
>>> - DDR (memory regions)
>>> - PINCTRL
>>> - PLIC
>>> - SCIF0
>>>
>>> Note we have deleted the nodes from the DT for which support needs to be
>>> added for RZ/Five SoC and are enabled by RZ/G2UL SMARC EVK SoM/carrier
>>> board DTS/I.
>>
>> idk, I am not sure what to think of this approach.
>>
>> What do you mean by "for which support needs to be added"? If the support
>> does not exist yet, then is surely you can just add the nodes and it will
>> be fine?
>>
> As pointed out previously, I am re-using the below files [1] (SoM) and
> [2] (Carrier board) as the RZ/Five SMARC EVK is pin compatible. Since
> [1] and [2] enable almost all the peripherals (status = okay) on the
> RZ/G2UL SMARC EVK which are supported. For example [1] enables SDHI0/1
> this high speed block needs DMA and without cache management fixed on
> Andes core we cannot enable this on RZ/Five SoC so currently a
> placeholder is added for it in the RZ/FIve SoC DTSI and is deleted in
> the board DTS file.
>
> Below blocks suffer the cache management issue:
> - DMAC
> - ETH
> - SDHI
> - USB
>
> Rest of the blocks will be gradually enabled (as soon as this initial
> patchset is merged) along with the DT binding doc updates.
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=v6.0-rc5
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.0-rc5
Explanations are reasonable, but again - that information is important
and really needs to be included in the commit message etc.
Thanks,
Conor.
next prev parent reply other threads:[~2022-09-15 22:44 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-15 18:15 [PATCH v3 00/10] Add support for Renesas RZ/Five SoC Prabhakar
2022-09-15 18:15 ` [PATCH v3 01/10] dt-bindings: soc: renesas: Move renesas.yaml from arm to soc Prabhakar
2022-09-15 21:13 ` Conor.Dooley
2022-09-15 21:56 ` Lad, Prabhakar
2022-09-20 12:00 ` Geert Uytterhoeven
2022-09-15 18:15 ` [PATCH v3 02/10] dt-bindings: riscv: Sort the CPU core list alphabetically Prabhakar
2022-09-15 20:53 ` Heiko Stuebner
2022-09-15 18:15 ` [PATCH v3 03/10] dt-bindings: riscv: Add Andes AX45MP core to the list Prabhakar
2022-09-15 18:15 ` [PATCH v3 04/10] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC Prabhakar
2022-09-15 18:15 ` [PATCH v3 05/10] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Prabhakar
2022-09-15 20:58 ` Conor.Dooley
2022-09-15 22:18 ` Lad, Prabhakar
2022-09-15 22:25 ` Conor.Dooley
2022-09-15 18:15 ` [PATCH v3 06/10] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Prabhakar
2022-09-15 18:15 ` [PATCH v3 07/10] riscv: boot: dts: r9a07g043: Add placeholder nodes Prabhakar
2022-09-15 21:36 ` Conor.Dooley
2022-09-15 22:26 ` Lad, Prabhakar
2022-09-15 22:40 ` Conor Dooley
2022-09-20 12:17 ` Geert Uytterhoeven
2022-09-20 12:31 ` Conor Dooley
2022-09-20 13:46 ` Lad, Prabhakar
2022-09-15 18:15 ` [PATCH v3 08/10] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK Prabhakar
2022-09-15 21:56 ` Conor.Dooley
2022-09-15 22:41 ` Lad, Prabhakar
2022-09-15 22:44 ` Conor.Dooley [this message]
2022-09-15 22:51 ` Lad, Prabhakar
2022-09-20 12:32 ` Geert Uytterhoeven
2022-09-20 14:05 ` Lad, Prabhakar
2022-09-20 15:07 ` Geert Uytterhoeven
2022-09-20 16:05 ` Lad, Prabhakar
2022-09-15 18:15 ` [PATCH v3 09/10] MAINTAINERS: Add entry for Renesas RISC-V architecture Prabhakar
2022-09-20 12:34 ` Geert Uytterhoeven
2022-09-15 18:15 ` [PATCH v3 10/10] RISC-V: configs: defconfig: Enable Renesas RZ/Five SoC Prabhakar
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