From: "Arnd Bergmann" <arnd@arndb.de>
To: "Manikanta Guntupalli" <manikanta.guntupalli@amd.com>,
git@amd.com, "Michal Simek" <michal.simek@amd.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Frank Li" <Frank.Li@nxp.com>, "Rob Herring" <robh@kernel.org>,
krzk+dt@kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
"Przemysław Gaj" <pgaj@cadence.com>,
"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
tommaso.merciai.xr@bp.renesas.com, quic_msavaliy@quicinc.com,
Shyam-sundar.S-k@amd.com,
"Sakari Ailus" <sakari.ailus@linux.intel.com>,
"'billy_tsai@aspeedtech.com'" <billy_tsai@aspeedtech.com>,
"Kees Cook" <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
"Jarkko Nikula" <jarkko.nikula@linux.intel.com>,
"Jorge Marques" <jorge.marques@analog.com>,
"linux-i3c@lists.infradead.org" <linux-i3c@lists.infradead.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Linux-Arch <linux-arch@vger.kernel.org>,
linux-hardening@vger.kernel.org
Cc: radhey.shyam.pandey@amd.com, srinivas.goud@amd.com,
shubhrajyoti.datta@amd.com, manion05gk@gmail.com
Subject: Re: [PATCH V7 2/4] asm-generic/io.h: Add big-endian MMIO accessors
Date: Tue, 23 Sep 2025 20:38:03 +0200 [thread overview]
Message-ID: <cde37e36-4763-48ca-a038-4a19eb1ef914@app.fastmail.com> (raw)
In-Reply-To: <20250923154551.2112388-3-manikanta.guntupalli@amd.com>
On Tue, Sep 23, 2025, at 17:45, Manikanta Guntupalli wrote:
> Add MMIO accessors to support big-endian memory operations. These helpers
> include {read, write}{w, l, q}_be() and {read, write}s{w, l, q}_be(),
> which allows to access big-endian memory regions while returning
> the results in the CPU’s native endianness.
>
> This provides a consistent interface to interact with hardware using
> big-endian register layouts.
>
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
I feel like we already have too many accessor functions like these,
what's wrong with just using io{read,write}{8,16,32,64}be() in
your driver?
On most architectures (including arm, riscv, powerpc and microblaze,
but not x86), the ioread/write helpers are identical to the
readl/writel style helpers, the only difference being that on x86
they add an extra indirection for the port I/O check.
At the moment, there are only six drivers that use the
io{read,write}{8,16,32,64}be() style helpers. They
are all powerpc specific and can probably be changed
to io{read,write}be.
Arnd
next prev parent reply other threads:[~2025-09-23 18:38 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 15:45 [PATCH V7 0/4] Add AMD I3C master controller driver and bindings Manikanta Guntupalli
2025-09-23 15:45 ` [PATCH V7 1/4] dt-bindings: i3c: Add AMD I3C master controller support Manikanta Guntupalli
2025-09-23 15:45 ` [PATCH V7 2/4] asm-generic/io.h: Add big-endian MMIO accessors Manikanta Guntupalli
2025-09-23 18:38 ` Arnd Bergmann [this message]
2025-09-24 8:59 ` Guntupalli, Manikanta
2025-09-24 9:46 ` Arnd Bergmann
2025-09-24 10:12 ` Guntupalli, Manikanta
2025-09-23 18:43 ` Frank Li
2025-09-24 20:34 ` kernel test robot
2025-09-25 6:15 ` kernel test robot
2025-09-23 15:45 ` [PATCH V7 3/4] i3c: master: Add endianness support for i3c_readl_fifo() and i3c_writel_fifo() Manikanta Guntupalli
2025-09-23 18:45 ` Frank Li
2025-09-23 18:51 ` Arnd Bergmann
2025-09-24 9:00 ` Guntupalli, Manikanta
2025-09-24 10:00 ` Arnd Bergmann
2025-09-24 12:22 ` Guntupalli, Manikanta
2025-09-24 14:05 ` Arnd Bergmann
2025-09-24 15:23 ` Guntupalli, Manikanta
2025-09-24 15:42 ` Arnd Bergmann
2025-09-25 9:26 ` Guntupalli, Manikanta
2025-09-25 12:14 ` Arnd Bergmann
2025-09-25 16:37 ` Guntupalli, Manikanta
2025-09-25 16:50 ` Frank Li
2025-09-25 12:22 ` kernel test robot
2025-09-23 15:45 ` [PATCH V7 4/4] i3c: master: Add AMD I3C bus controller driver Manikanta Guntupalli
2025-09-23 19:22 ` Frank Li
2025-09-25 5:42 ` Guntupalli, Manikanta
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