Re: [PATCH 4/4] phy: qcom: phy-qcom-snps-eusb2: Add extra register write for SM7635

[neil.armstrong@linaro.org]

On 25/06/2025 11:14, Luca Weiss wrote:
> As per the downstream devicetree for SM7635, add a register write for
> QCOM_USB_PHY_CFG_CTRL_1 as per the "eUSB2 HPG version 1.0.2 update".
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
> The downstream driver supports an arbitrary extra init sequence via
> qcom,param-override-seq.
> 
> volcano-usb.dtsi has the following which is implemented in this patch:
> 
>      /* eUSB2 HPG version 1.0.2 update */
>      qcom,param-override-seq =
>              <0x00 0x58>;
> ---
>   drivers/phy/phy-snps-eusb2.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/phy/phy-snps-eusb2.c b/drivers/phy/phy-snps-eusb2.c
> index e232b8b4d29100b8fee9e913e2124788af09f2aa..6122fc797c7fd3011936edc3ff4dafe6a58e6583 100644
> --- a/drivers/phy/phy-snps-eusb2.c
> +++ b/drivers/phy/phy-snps-eusb2.c
> @@ -420,6 +420,12 @@ static int qcom_snps_eusb2_hsphy_init(struct phy *p)
>   	/* set default parameters */
>   	qcom_eusb2_default_parameters(phy);
>   
> +	if (of_device_is_compatible(p->dev.of_node, "qcom,sm7635-snps-eusb2-phy")) {
> +		/* eUSB2 HPG version 1.0.2 update */
> +		writel_relaxed(0x0, phy->base + QCOM_USB_PHY_CFG_CTRL_1);
> +		readl_relaxed(phy->base + QCOM_USB_PHY_CFG_CTRL_1);
> +	}
> +
>   	snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,
>   				    USB2_SUSPEND_N_SEL | USB2_SUSPEND_N,
>   				    USB2_SUSPEND_N_SEL | USB2_SUSPEND_N);
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>