From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE7D3C433EF for ; Tue, 5 Jul 2022 03:50:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234378AbiGEDuv (ORCPT ); Mon, 4 Jul 2022 23:50:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231820AbiGEDut (ORCPT ); Mon, 4 Jul 2022 23:50:49 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63BD210FEB; Mon, 4 Jul 2022 20:50:47 -0700 (PDT) X-UUID: 7aba407e5d3b4efe840c944da8075a85-20220705 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:bb865ede-3122-4077-bea8-be160ff1df21,OB:0,LO B:10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,AC TION:release,TS:50 X-CID-INFO: VERSION:1.1.8,REQID:bb865ede-3122-4077-bea8-be160ff1df21,OB:0,LOB: 10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:50 X-CID-META: VersionHash:0f94e32,CLOUDID:f9d48d86-57f0-47ca-ba27-fe8c57fbf305,C OID:afb3c8819ce9,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: 7aba407e5d3b4efe840c944da8075a85-20220705 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 928466703; Tue, 05 Jul 2022 11:50:44 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 5 Jul 2022 11:50:42 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Tue, 5 Jul 2022 11:50:42 +0800 Message-ID: Subject: Re: [PATCH v15 06/16] drm/mediatek: dpi: implement a CK/DE pol toggle in SoC config From: CK Hu To: Bo-Chen Chen , , , , , , , CC: , , , , , , , , , , , , Date: Tue, 5 Jul 2022 11:50:42 +0800 In-Reply-To: <20220701035845.16458-7-rex-bc.chen@mediatek.com> References: <20220701035845.16458-1-rex-bc.chen@mediatek.com> <20220701035845.16458-7-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, Bo-Chen: On Fri, 2022-07-01 at 11:58 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet > > Dp_intf does not support CK/DE polarity because the polarity > information > is not used for eDP and DP while dp_intf is only for eDP and DP. > Therefore, we add a bit of flexibility to support SoCs without CK/DE > pol > support. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK > > Signed-off-by: Guillaume Ranquet > Signed-off-by: Bo-Chen Chen > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Rex-BC Chen > Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 0855bbdfe4e1..b89ad9f38396 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit { > * @edge_sel_en: Enable of edge selection. > * @output_fmts: Array of supported output formats. > * @num_output_fmts: Quantity of supported output formats. > + * @is_ck_de_pol: Support CK/DE polarity. > */ > struct mtk_dpi_conf { > unsigned int (*cal_factor)(int clock); > @@ -128,6 +129,7 @@ struct mtk_dpi_conf { > bool edge_sel_en; > const u32 *output_fmts; > u32 num_output_fmts; > + bool is_ck_de_pol; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -213,13 +215,20 @@ static void mtk_dpi_config_pol(struct mtk_dpi > *dpi, > struct mtk_dpi_polarities *dpi_pol) > { > unsigned int pol; > + unsigned int mask; > > - pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) > | > - (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) > | > - (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : > HSYNC_POL) | > + mask = HSYNC_POL | VSYNC_POL; > + pol = (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : > HSYNC_POL) | > (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : > VSYNC_POL); > - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, > - CK_POL | DE_POL | HSYNC_POL | VSYNC_POL); > + if (dpi->conf->is_ck_de_pol) { > + mask |= CK_POL | DE_POL; > + pol |= (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? > + 0 : CK_POL) | > + (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? > + 0 : DE_POL); > + } > + > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask); > } > > static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d) > @@ -794,6 +803,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .max_clock_khz = 300000, > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > + .is_ck_de_pol = true, > }; > > static const struct mtk_dpi_conf mt2701_conf = { > @@ -803,6 +813,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .max_clock_khz = 150000, > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > + .is_ck_de_pol = true, > }; > > static const struct mtk_dpi_conf mt8183_conf = { > @@ -811,6 +822,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .max_clock_khz = 100000, > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > + .is_ck_de_pol = true, > }; > > static const struct mtk_dpi_conf mt8192_conf = { > @@ -819,6 +831,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .max_clock_khz = 150000, > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > + .is_ck_de_pol = true, > }; > > static int mtk_dpi_probe(struct platform_device *pdev)