* [PATCH 0/3] media: qcom: camss: Add sm6150 camss support
@ 2025-10-16 10:22 Wenmeng Liu
2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu
` (2 more replies)
0 siblings, 3 replies; 15+ messages in thread
From: Wenmeng Liu @ 2025-10-16 10:22 UTC (permalink / raw)
To: Robert Foss, Todor Tomov, Bryan O'Donoghue,
Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Wenmeng Liu, Bjorn Andersson,
Konrad Dybcio
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel
SM6150 is a Qualcomm flagship SoC. This series adds support to
the CSIPHY, CSID, VFE/RDI interfaces in SM6150.
SM6150 provides
- 2 x VFE, 3 RDI per VFE
- 1 x VFE Lite, 4 RDI per VFE
- 2 x CSID
- 1 x CSID Lite
- 3 x CSI PHY
Tested on Talos EVK board.
Tested with following commands:
media-ctl -d /dev/media0 --reset
media-ctl -d /dev/media0 -V '"imx577 9-001a":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -d /dev/media0 -l '"msm_csiphy1":1->"msm_csid0":0[1]'
media-ctl -d /dev/media0 -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0 --capture=5
---
Wenmeng Liu (3):
media: dt-bindings: Add qcom,sm6150-camss
media: qcom: camss: add support for SM6150 camss
arm64: dts: qcom: sm6150: Add camss node
.../bindings/media/qcom,sm6150-camss.yaml | 283 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm6150.dtsi | 121 +++++++++
.../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 2 +
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 186 ++++++++++++++
drivers/media/platform/qcom/camss/camss.h | 1 +
6 files changed, 595 insertions(+)
---
base-commit: 1fdbb3ff1233e204e26f9f6821ae9c125a055229
change-id: 20251016-sm6150-camss-ab16c59c2019
Best regards,
--
Wenmeng <wenmeng.liu@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss 2025-10-16 10:22 [PATCH 0/3] media: qcom: camss: Add sm6150 camss support Wenmeng Liu @ 2025-10-16 10:22 ` Wenmeng Liu 2025-10-16 10:43 ` Bryan O'Donoghue ` (2 more replies) 2025-10-16 10:22 ` [PATCH 2/3] media: qcom: camss: add support for SM6150 camss Wenmeng Liu 2025-10-16 10:22 ` [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node Wenmeng Liu 2 siblings, 3 replies; 15+ messages in thread From: Wenmeng Liu @ 2025-10-16 10:22 UTC (permalink / raw) To: Robert Foss, Todor Tomov, Bryan O'Donoghue, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wenmeng Liu, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel Add bindings for qcom,sm6150-camss in order to support the camera subsystem found in Qualcomm Talos EVK board. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> --- .../bindings/media/qcom,sm6150-camss.yaml | 283 +++++++++++++++++++++ 1 file changed, 283 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..758bed0970f2ceee7df30b579a0f60d583a9230c --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml @@ -0,0 +1,283 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6150 Camera Subsystem (CAMSS) + +maintainers: + - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sm6150-camss + + reg: + maxItems: 9 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + clocks: + maxItems: 21 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: gcc_axi_hf + - const: soc_ahb + - const: vfe0 + - const: vfe0_axi + - const: vfe0_cphy_rx + - const: vfe0_csid + - const: vfe1 + - const: vfe1_axi + - const: vfe1_cphy_rx + - const: vfe1_csid + - const: vfe_lite + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ahb + - const: hf_mnoc + + iommus: + maxItems: 1 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + vdd-csiphy-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSI PHYs. + + vdd-csiphy-1p8-supply: + description: + Phandle to 1.8V regulator supply to CSI PHYs pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-2]+$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data from a CSIPHY. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + - vdd-csiphy-1p2-supply + - vdd-csiphy-1p8-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,qcs615-camcc.h> + #include <dt-bindings/clock/qcom,qcs615-gcc.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: isp@acb3000 { + compatible = "qcom,sm6150-camss"; + + reg = <0x0 0x0acb3000 0x0 0x1000>, + <0x0 0x0acba000 0x0 0x1000>, + <0x0 0x0acc8000 0x0 0x1000>, + <0x0 0x0ac65000 0x0 0x1000>, + <0x0 0x0ac66000 0x0 0x1000>, + <0x0 0x0ac67000 0x0 0x1000>, + <0x0 0x0acaf000 0x0 0x4000>, + <0x0 0x0acb6000 0x0 0x4000>, + <0x0 0x0acc4000 0x0 0x4000>; + reg-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_axi_hf", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe0_csid", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe1_csid", + "vfe_lite", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_mnoc"; + + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + iommus = <&apps_smmu 0x820 0x40>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>; + vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + csiphy_ep0: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&sensor_ep>; + }; + }; + }; + }; + }; -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu @ 2025-10-16 10:43 ` Bryan O'Donoghue 2025-10-16 13:00 ` Wenmeng Liu 2025-10-16 13:31 ` Vladimir Zapolskiy 2025-10-28 9:49 ` Krzysztof Kozlowski 2 siblings, 1 reply; 15+ messages in thread From: Bryan O'Donoghue @ 2025-10-16 10:43 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 16/10/2025 11:22, Wenmeng Liu wrote: > Add bindings for qcom,sm6150-camss in order to support the camera > subsystem found in Qualcomm Talos EVK board. Understood you are doing this to support the Talos EVK but the yaml should describe the specific SoC. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > --- > .../bindings/media/qcom,sm6150-camss.yaml | 283 +++++++++++++++++++++ > 1 file changed, 283 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..758bed0970f2ceee7df30b579a0f60d583a9230c > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml > @@ -0,0 +1,283 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM6150 Camera Subsystem (CAMSS) > + > +maintainers: > + - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > + > +description: > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sm6150-camss > + > + reg: > + maxItems: 9 > + > + reg-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: vfe0 > + - const: vfe1 > + - const: vfe_lite > + > + clocks: > + maxItems: 21 > + > + clock-names: > + items: > + - const: camnoc_axi > + - const: cpas_ahb > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: gcc_axi_hf > + - const: soc_ahb > + - const: vfe0 > + - const: vfe0_axi > + - const: vfe0_cphy_rx > + - const: vfe0_csid > + - const: vfe1 > + - const: vfe1_axi > + - const: vfe1_cphy_rx > + - const: vfe1_csid > + - const: vfe_lite > + - const: vfe_lite_cphy_rx > + - const: vfe_lite_csid > + > + interrupts: > + maxItems: 9 > + > + interrupt-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: vfe0 > + - const: vfe1 > + - const: vfe_lite > + > + interconnects: > + maxItems: 2 > + > + interconnect-names: > + items: > + - const: ahb > + - const: hf_mnoc > + > + iommus: > + maxItems: 1 > + > + power-domains: > + items: > + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: top > + > + vdd-csiphy-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSI PHYs. > + > + vdd-csiphy-1p8-supply: > + description: > + Phandle to 1.8V regulator supply to CSI PHYs pll block. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + patternProperties: > + "^port@[0-2]+$": > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + > + description: > + Input port for receiving CSI data from a CSIPHY. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - data-lanes > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - interconnects > + - interconnect-names > + - iommus > + - power-domains > + - power-domain-names > + - vdd-csiphy-1p2-supply > + - vdd-csiphy-1p8-supply > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmh.h> > + #include <dt-bindings/clock/qcom,qcs615-camcc.h> > + #include <dt-bindings/clock/qcom,qcs615-gcc.h> rpmh should come after qcs615. > + #include <dt-bindings/interconnect/qcom,icc.h> > + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/qcom-rpmpd.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + camss: isp@acb3000 { > + compatible = "qcom,sm6150-camss"; > + > + reg = <0x0 0x0acb3000 0x0 0x1000>, > + <0x0 0x0acba000 0x0 0x1000>, > + <0x0 0x0acc8000 0x0 0x1000>, > + <0x0 0x0ac65000 0x0 0x1000>, > + <0x0 0x0ac66000 0x0 0x1000>, > + <0x0 0x0ac67000 0x0 0x1000>, > + <0x0 0x0acaf000 0x0 0x4000>, > + <0x0 0x0acb6000 0x0 0x4000>, > + <0x0 0x0acc4000 0x0 0x4000>; > + reg-names = "csid0", > + "csid1", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "vfe0", > + "vfe1", > + "vfe_lite"; > + > + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, > + <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CSIPHY0_CLK>, > + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY1_CLK>, > + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY2_CLK>, > + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > + <&gcc GCC_CAMERA_HF_AXI_CLK>, > + <&camcc CAM_CC_SOC_AHB_CLK>, > + <&camcc CAM_CC_IFE_0_CLK>, > + <&camcc CAM_CC_IFE_0_AXI_CLK>, > + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_0_CSID_CLK>, > + <&camcc CAM_CC_IFE_1_CLK>, > + <&camcc CAM_CC_IFE_1_AXI_CLK>, > + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_1_CSID_CLK>, > + <&camcc CAM_CC_IFE_LITE_CLK>, > + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; > + > + clock-names = "camnoc_axi", > + "cpas_ahb", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "gcc_axi_hf", > + "soc_ahb", > + "vfe0", > + "vfe0_axi", > + "vfe0_cphy_rx", > + "vfe0_csid", > + "vfe1", > + "vfe1_axi", > + "vfe1_cphy_rx", > + "vfe1_csid", > + "vfe_lite", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_mnoc"; > + > + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csid0", > + "csid1", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "vfe0", > + "vfe1", > + "vfe_lite"; > + > + iommus = <&apps_smmu 0x820 0x40>; > + > + power-domains = <&camcc IFE_0_GDSC>, > + <&camcc IFE_1_GDSC>, > + <&camcc TITAN_TOP_GDSC>; > + power-domain-names = "ife0", > + "ife1", > + "top"; > + > + vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>; > + vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + csiphy_ep0: endpoint { > + data-lanes = <0 1>; > + remote-endpoint = <&sensor_ep>; > + }; > + }; > + }; > + }; > + }; > ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss 2025-10-16 10:43 ` Bryan O'Donoghue @ 2025-10-16 13:00 ` Wenmeng Liu 0 siblings, 0 replies; 15+ messages in thread From: Wenmeng Liu @ 2025-10-16 13:00 UTC (permalink / raw) To: Bryan O'Donoghue, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/2025 6:43 PM, Bryan O'Donoghue wrote: > On 16/10/2025 11:22, Wenmeng Liu wrote: >> Add bindings for qcom,sm6150-camss in order to support the camera >> subsystem found in Qualcomm Talos EVK board. > > Understood you are doing this to support the Talos EVK but the yaml > should describe the specific SoC. > ACK>> >> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> >> --- >> .../bindings/media/qcom,sm6150-camss.yaml | 283 +++++++++++ >> ++++++++++ >> 1 file changed, 283 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/media/qcom,sm6150- >> camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6150- >> camss.yaml >> new file mode 100644 >> index >> 0000000000000000000000000000000000000000..758bed0970f2ceee7df30b579a0f60d583a9230c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml >> @@ -0,0 +1,283 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm SM6150 Camera Subsystem (CAMSS) >> + >> +maintainers: >> + - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> >> + >> +description: >> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. >> + >> +properties: >> + compatible: >> + const: qcom,sm6150-camss >> + >> + reg: >> + maxItems: 9 >> + >> + reg-names: >> + items: >> + - const: csid0 >> + - const: csid1 >> + - const: csid_lite >> + - const: csiphy0 >> + - const: csiphy1 >> + - const: csiphy2 >> + - const: vfe0 >> + - const: vfe1 >> + - const: vfe_lite >> + >> + clocks: >> + maxItems: 21 >> + >> + clock-names: >> + items: >> + - const: camnoc_axi >> + - const: cpas_ahb >> + - const: csiphy0 >> + - const: csiphy0_timer >> + - const: csiphy1 >> + - const: csiphy1_timer >> + - const: csiphy2 >> + - const: csiphy2_timer >> + - const: gcc_axi_hf >> + - const: soc_ahb >> + - const: vfe0 >> + - const: vfe0_axi >> + - const: vfe0_cphy_rx >> + - const: vfe0_csid >> + - const: vfe1 >> + - const: vfe1_axi >> + - const: vfe1_cphy_rx >> + - const: vfe1_csid >> + - const: vfe_lite >> + - const: vfe_lite_cphy_rx >> + - const: vfe_lite_csid >> + >> + interrupts: >> + maxItems: 9 >> + >> + interrupt-names: >> + items: >> + - const: csid0 >> + - const: csid1 >> + - const: csid_lite >> + - const: csiphy0 >> + - const: csiphy1 >> + - const: csiphy2 >> + - const: vfe0 >> + - const: vfe1 >> + - const: vfe_lite >> + >> + interconnects: >> + maxItems: 2 >> + >> + interconnect-names: >> + items: >> + - const: ahb >> + - const: hf_mnoc >> + >> + iommus: >> + maxItems: 1 >> + >> + power-domains: >> + items: >> + - description: IFE0 GDSC - Image Front End, Global Distributed >> Switch Controller. >> + - description: IFE1 GDSC - Image Front End, Global Distributed >> Switch Controller. >> + - description: Titan GDSC - Titan ISP Block, Global Distributed >> Switch Controller. >> + >> + power-domain-names: >> + items: >> + - const: ife0 >> + - const: ife1 >> + - const: top >> + >> + vdd-csiphy-1p2-supply: >> + description: >> + Phandle to a 1.2V regulator supply to CSI PHYs. >> + >> + vdd-csiphy-1p8-supply: >> + description: >> + Phandle to 1.8V regulator supply to CSI PHYs pll block. >> + >> + ports: >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + description: >> + CSI input ports. >> + >> + patternProperties: >> + "^port@[0-2]+$": >> + $ref: /schemas/graph.yaml#/$defs/port-base >> + unevaluatedProperties: false >> + >> + description: >> + Input port for receiving CSI data from a CSIPHY. >> + >> + properties: >> + endpoint: >> + $ref: video-interfaces.yaml# >> + unevaluatedProperties: false >> + >> + properties: >> + data-lanes: >> + minItems: 1 >> + maxItems: 4 >> + >> + required: >> + - data-lanes >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - clocks >> + - clock-names >> + - interrupts >> + - interrupt-names >> + - interconnects >> + - interconnect-names >> + - iommus >> + - power-domains >> + - power-domain-names >> + - vdd-csiphy-1p2-supply >> + - vdd-csiphy-1p8-supply >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,rpmh.h> >> + #include <dt-bindings/clock/qcom,qcs615-camcc.h> >> + #include <dt-bindings/clock/qcom,qcs615-gcc.h> > > rpmh should come after qcs615. > ACK>> + #include <dt-bindings/interconnect/qcom,icc.h> >> + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/power/qcom-rpmpd.h> >> + >> + soc { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + camss: isp@acb3000 { >> + compatible = "qcom,sm6150-camss"; >> + >> + reg = <0x0 0x0acb3000 0x0 0x1000>, >> + <0x0 0x0acba000 0x0 0x1000>, >> + <0x0 0x0acc8000 0x0 0x1000>, >> + <0x0 0x0ac65000 0x0 0x1000>, >> + <0x0 0x0ac66000 0x0 0x1000>, >> + <0x0 0x0ac67000 0x0 0x1000>, >> + <0x0 0x0acaf000 0x0 0x4000>, >> + <0x0 0x0acb6000 0x0 0x4000>, >> + <0x0 0x0acc4000 0x0 0x4000>; >> + reg-names = "csid0", >> + "csid1", >> + "csid_lite", >> + "csiphy0", >> + "csiphy1", >> + "csiphy2", >> + "vfe0", >> + "vfe1", >> + "vfe_lite"; >> + >> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, >> + <&camcc CAM_CC_CPAS_AHB_CLK>, >> + <&camcc CAM_CC_CSIPHY0_CLK>, >> + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, >> + <&camcc CAM_CC_CSIPHY1_CLK>, >> + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, >> + <&camcc CAM_CC_CSIPHY2_CLK>, >> + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, >> + <&gcc GCC_CAMERA_HF_AXI_CLK>, >> + <&camcc CAM_CC_SOC_AHB_CLK>, >> + <&camcc CAM_CC_IFE_0_CLK>, >> + <&camcc CAM_CC_IFE_0_AXI_CLK>, >> + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, >> + <&camcc CAM_CC_IFE_0_CSID_CLK>, >> + <&camcc CAM_CC_IFE_1_CLK>, >> + <&camcc CAM_CC_IFE_1_AXI_CLK>, >> + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, >> + <&camcc CAM_CC_IFE_1_CSID_CLK>, >> + <&camcc CAM_CC_IFE_LITE_CLK>, >> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, >> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; >> + >> + clock-names = "camnoc_axi", >> + "cpas_ahb", >> + "csiphy0", >> + "csiphy0_timer", >> + "csiphy1", >> + "csiphy1_timer", >> + "csiphy2", >> + "csiphy2_timer", >> + "gcc_axi_hf", >> + "soc_ahb", >> + "vfe0", >> + "vfe0_axi", >> + "vfe0_cphy_rx", >> + "vfe0_csid", >> + "vfe1", >> + "vfe1_axi", >> + "vfe1_cphy_rx", >> + "vfe1_csid", >> + "vfe_lite", >> + "vfe_lite_cphy_rx", >> + "vfe_lite_csid"; >> + >> + interconnects = <&gem_noc MASTER_APPSS_PROC >> QCOM_ICC_TAG_ACTIVE_ONLY >> + &config_noc SLAVE_CAMERA_CFG >> QCOM_ICC_TAG_ACTIVE_ONLY>, >> + <&mmss_noc MASTER_CAMNOC_HF0 >> QCOM_ICC_TAG_ALWAYS >> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >> + interconnect-names = "ahb", >> + "hf_mnoc"; >> + >> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "csid0", >> + "csid1", >> + "csid_lite", >> + "csiphy0", >> + "csiphy1", >> + "csiphy2", >> + "vfe0", >> + "vfe1", >> + "vfe_lite"; >> + >> + iommus = <&apps_smmu 0x820 0x40>; >> + >> + power-domains = <&camcc IFE_0_GDSC>, >> + <&camcc IFE_1_GDSC>, >> + <&camcc TITAN_TOP_GDSC>; >> + power-domain-names = "ife0", >> + "ife1", >> + "top"; >> + >> + vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>; >> + vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + csiphy_ep0: endpoint { >> + data-lanes = <0 1>; >> + remote-endpoint = <&sensor_ep>; >> + }; >> + }; >> + }; >> + }; >> + }; >> > will update in next version. Thanks, Wenmeng ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu 2025-10-16 10:43 ` Bryan O'Donoghue @ 2025-10-16 13:31 ` Vladimir Zapolskiy 2025-10-28 9:49 ` Krzysztof Kozlowski 2 siblings, 0 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2025-10-16 13:31 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/25 13:22, Wenmeng Liu wrote: > Add bindings for qcom,sm6150-camss in order to support the camera > subsystem found in Qualcomm Talos EVK board. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Looks good, please add my RB to the next version. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu 2025-10-16 10:43 ` Bryan O'Donoghue 2025-10-16 13:31 ` Vladimir Zapolskiy @ 2025-10-28 9:49 ` Krzysztof Kozlowski 2 siblings, 0 replies; 15+ messages in thread From: Krzysztof Kozlowski @ 2025-10-28 9:49 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 16/10/2025 12:22, Wenmeng Liu wrote: > Add bindings for qcom,sm6150-camss in order to support the camera > subsystem found in Qualcomm Talos EVK board. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > --- > .../bindings/media/qcom,sm6150-camss.yaml | 283 +++++++++++++++++++++ > 1 file changed, 283 insertions(+) Please implement/go through same comments I gave to Luca. https://lore.kernel.org/all/20251028-defiant-visionary-rottweiler-f97cda@kuoka/ It is somehow huge mess with camss with every binding re-inventing names, resorting everything and keeping nothing in common. I feel sad when looking at existing bindings. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/3] media: qcom: camss: add support for SM6150 camss 2025-10-16 10:22 [PATCH 0/3] media: qcom: camss: Add sm6150 camss support Wenmeng Liu 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu @ 2025-10-16 10:22 ` Wenmeng Liu 2025-10-16 10:29 ` Bryan O'Donoghue 2025-10-16 13:43 ` Vladimir Zapolskiy 2025-10-16 10:22 ` [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node Wenmeng Liu 2 siblings, 2 replies; 15+ messages in thread From: Wenmeng Liu @ 2025-10-16 10:22 UTC (permalink / raw) To: Robert Foss, Todor Tomov, Bryan O'Donoghue, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wenmeng Liu, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel The camera subsystem for SM6150 which is based on Spectra 230. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 2 + drivers/media/platform/qcom/camss/camss-vfe.c | 2 + drivers/media/platform/qcom/camss/camss.c | 186 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 4 files changed, 191 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index a229ba04b158739ddfe4076bdd28167a309f13ea..7bc524a9c4bbe3a316e366868e9d636e58d5956a 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -908,6 +908,7 @@ static bool csiphy_is_gen2(u32 version) switch (version) { case CAMSS_2290: + case CAMSS_6150: case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: @@ -996,6 +997,7 @@ static int csiphy_init(struct csiphy_device *csiphy) regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845); break; case CAMSS_2290: + case CAMSS_6150: regs->lane_regs = &lane_regs_qcm2290[0]; regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290); break; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index dff8d0a1e8c228878d03d95aaf91f262b208f9e7..2ec796b6f82d67d7a1bc332a0d770a8185ba3fdd 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -341,6 +341,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, break; case CAMSS_660: case CAMSS_2290: + case CAMSS_6150: case CAMSS_7280: case CAMSS_8x96: case CAMSS_8250: @@ -1989,6 +1990,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) int ret = 8; switch (vfe->camss->res->version) { + case CAMSS_6150: case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 2fbcd0e343aac9620a5a30719c42e1b887cf34ed..51e2522d4d01dd7bb4581c721544835c47b09c38 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -1318,6 +1318,178 @@ static const struct camss_subdev_resources vfe_res_845[] = { } }; +static const struct camss_subdev_resources csiphy_res_6150[] = { + /* CSIPHY0 */ + { + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, + .clock = { "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 269333333, 384000000 }, + { 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + /* CSIPHY1 */ + { + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, + .clock = { "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 269333333, 384000000 }, + { 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + /* CSIPHY2 */ + { + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, + .clock = { "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 269333333, 384000000 }, + { 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, +}; + +static const struct camss_subdev_resources csid_res_6150[] = { + /* CSID0 */ + { + .regulators = {}, + .clock = { "vfe0_cphy_rx", "vfe0_csid" }, + .clock_rate = { { 269333333, 384000000 }, + { 320000000, 540000000 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID1 */ + { + .regulators = {}, + .clock = { "vfe1_cphy_rx", "vfe1_csid" }, + .clock_rate = { { 269333333, 384000000 }, + { 320000000, 540000000 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID2 */ + { + .regulators = {}, + .clock = { "vfe_lite_cphy_rx", "vfe_lite_csid" }, + .clock_rate = { { 269333333, 384000000 }, + { 320000000, 540000000 } }, + .reg = { "csid_lite" }, + .interrupt = { "csid_lite" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, +}; + +static const struct camss_subdev_resources vfe_res_6150[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi"}, + .clock_rate = { { 0 }, + { 400000000 }, + { 80000000 }, + { 37500000, 40000000 }, + { 360000000, 432000000, 540000000, 600000000 }, + { 265000000, 426000000 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE1 */ + { + .regulators = {}, + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi"}, + .clock_rate = { { 0 }, + { 400000000 }, + { 80000000 }, + { 37500000, 40000000 }, + { 360000000, 432000000, 540000000, 600000000 }, + { 265000000, 426000000 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE2 */ + { + .regulators = {}, + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite" }, + .clock_rate = { { 0 }, + { 400000000 }, + { 80000000 }, + { 37500000, 40000000 }, + { 360000000, 432000000, 540000000, 600000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, +}; + +static const struct resources_icc icc_res_sm6150[] = { + { + .name = "ahb", + .icc_bw_tbl.avg = 38400, + .icc_bw_tbl.peak = 76800, + }, + { + .name = "hf_mnoc", + .icc_bw_tbl.avg = 2097152, + .icc_bw_tbl.peak = 2097152, + }, +}; + static const struct camss_subdev_resources csiphy_res_8250[] = { /* CSIPHY0 */ { @@ -4438,6 +4610,19 @@ static const struct camss_resources sc7280_resources = { .vfe_num = ARRAY_SIZE(vfe_res_7280), }; +static const struct camss_resources sm6150_resources = { + .version = CAMSS_6150, + .pd_name = "top", + .csiphy_res = csiphy_res_6150, + .csid_res = csid_res_6150, + .vfe_res = vfe_res_6150, + .icc_res = icc_res_sm6150, + .icc_path_num = ARRAY_SIZE(icc_res_sm6150), + .csiphy_num = ARRAY_SIZE(csiphy_res_6150), + .csid_num = ARRAY_SIZE(csid_res_6150), + .vfe_num = ARRAY_SIZE(vfe_res_6150), +}; + static const struct camss_resources sm8550_resources = { .version = CAMSS_8550, .pd_name = "top", @@ -4478,6 +4663,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, + { .compatible = "qcom,sm6150-camss", .data = &sm6150_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources }, { .compatible = "qcom,x1e80100-camss", .data = &x1e80100_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index a70fbc78ccc307c0abc2f3c834fb1e2dafd83c6b..b60556f2f226104adb48908bdb436f389fb1e1ad 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -79,6 +79,7 @@ enum pm_domain { enum camss_version { CAMSS_660, CAMSS_2290, + CAMSS_6150, CAMSS_7280, CAMSS_8x16, CAMSS_8x53, -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] media: qcom: camss: add support for SM6150 camss 2025-10-16 10:22 ` [PATCH 2/3] media: qcom: camss: add support for SM6150 camss Wenmeng Liu @ 2025-10-16 10:29 ` Bryan O'Donoghue 2025-10-16 12:36 ` Wenmeng Liu 2025-10-16 13:43 ` Vladimir Zapolskiy 1 sibling, 1 reply; 15+ messages in thread From: Bryan O'Donoghue @ 2025-10-16 10:29 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 16/10/2025 11:22, Wenmeng Liu wrote: > The camera subsystem for SM6150 which is based on Spectra 230. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Your commit log needs more detail. - VFE17x version what ? - CSID version .. gen2 so CSID 480 is it ? - CSIPHY process node would be nice > --- > .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 2 + > drivers/media/platform/qcom/camss/camss-vfe.c | 2 + > drivers/media/platform/qcom/camss/camss.c | 186 +++++++++++++++++++++ > drivers/media/platform/qcom/camss/camss.h | 1 + > 4 files changed, 191 insertions(+) > > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > index a229ba04b158739ddfe4076bdd28167a309f13ea..7bc524a9c4bbe3a316e366868e9d636e58d5956a 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > @@ -908,6 +908,7 @@ static bool csiphy_is_gen2(u32 version) > > switch (version) { > case CAMSS_2290: > + case CAMSS_6150: > case CAMSS_7280: > case CAMSS_8250: > case CAMSS_8280XP: > @@ -996,6 +997,7 @@ static int csiphy_init(struct csiphy_device *csiphy) > regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845); > break; > case CAMSS_2290: > + case CAMSS_6150: > regs->lane_regs = &lane_regs_qcm2290[0]; You don't need to specify the array index for that. > regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290); > break; > diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c > index dff8d0a1e8c228878d03d95aaf91f262b208f9e7..2ec796b6f82d67d7a1bc332a0d770a8185ba3fdd 100644 > --- a/drivers/media/platform/qcom/camss/camss-vfe.c > +++ b/drivers/media/platform/qcom/camss/camss-vfe.c > @@ -341,6 +341,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, > break; > case CAMSS_660: > case CAMSS_2290: > + case CAMSS_6150: > case CAMSS_7280: > case CAMSS_8x96: > case CAMSS_8250: > @@ -1989,6 +1990,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) > int ret = 8; > > switch (vfe->camss->res->version) { > + case CAMSS_6150: > case CAMSS_7280: > case CAMSS_8250: > case CAMSS_8280XP: > diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c > index 2fbcd0e343aac9620a5a30719c42e1b887cf34ed..51e2522d4d01dd7bb4581c721544835c47b09c38 100644 > --- a/drivers/media/platform/qcom/camss/camss.c > +++ b/drivers/media/platform/qcom/camss/camss.c > @@ -1318,6 +1318,178 @@ static const struct camss_subdev_resources vfe_res_845[] = { > } > }; > > +static const struct camss_subdev_resources csiphy_res_6150[] = { > + /* CSIPHY0 */ > + { > + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, > + .clock = { "csiphy0", "csiphy0_timer" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 269333333 } }, > + .reg = { "csiphy0" }, > + .interrupt = { "csiphy0" }, > + .csiphy = { > + .hw_ops = &csiphy_ops_3ph_1_0, > + .formats = &csiphy_formats_sdm845 > + } > + }, > + /* CSIPHY1 */ > + { > + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, > + .clock = { "csiphy1", "csiphy1_timer" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 269333333 } }, > + .reg = { "csiphy1" }, > + .interrupt = { "csiphy1" }, > + .csiphy = { > + .hw_ops = &csiphy_ops_3ph_1_0, > + .formats = &csiphy_formats_sdm845 > + } > + }, > + /* CSIPHY2 */ > + { > + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, > + .clock = { "csiphy2", "csiphy2_timer" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 269333333 } }, > + .reg = { "csiphy2" }, > + .interrupt = { "csiphy2" }, > + .csiphy = { > + .hw_ops = &csiphy_ops_3ph_1_0, > + .formats = &csiphy_formats_sdm845 > + } > + }, > +}; > + > +static const struct camss_subdev_resources csid_res_6150[] = { > + /* CSID0 */ > + { > + .regulators = {}, > + .clock = { "vfe0_cphy_rx", "vfe0_csid" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 320000000, 540000000 } }, > + .reg = { "csid0" }, > + .interrupt = { "csid0" }, > + .csid = { > + .is_lite = false, > + .hw_ops = &csid_ops_gen2, > + .parent_dev_ops = &vfe_parent_dev_ops, > + .formats = &csid_formats_gen2 > + } > + }, > + /* CSID1 */ > + { > + .regulators = {}, > + .clock = { "vfe1_cphy_rx", "vfe1_csid" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 320000000, 540000000 } }, > + .reg = { "csid1" }, > + .interrupt = { "csid1" }, > + .csid = { > + .is_lite = false, > + .hw_ops = &csid_ops_gen2, > + .parent_dev_ops = &vfe_parent_dev_ops, > + .formats = &csid_formats_gen2 > + } > + }, > + /* CSID2 */ > + { > + .regulators = {}, > + .clock = { "vfe_lite_cphy_rx", "vfe_lite_csid" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 320000000, 540000000 } }, > + .reg = { "csid_lite" }, > + .interrupt = { "csid_lite" }, > + .csid = { > + .is_lite = true, > + .hw_ops = &csid_ops_gen2, > + .parent_dev_ops = &vfe_parent_dev_ops, > + .formats = &csid_formats_gen2 > + } > + }, > +}; > + > +static const struct camss_subdev_resources vfe_res_6150[] = { > + /* VFE0 */ > + { > + .regulators = {}, > + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", > + "vfe0", "vfe0_axi"}, > + .clock_rate = { { 0 }, > + { 400000000 }, > + { 80000000 }, > + { 37500000, 40000000 }, > + { 360000000, 432000000, 540000000, 600000000 }, > + { 265000000, 426000000 } }, > + .reg = { "vfe0" }, > + .interrupt = { "vfe0" }, > + .vfe = { > + .line_num = 3, > + .is_lite = false, > + .has_pd = true, > + .pd_name = "ife0", > + .hw_ops = &vfe_ops_170, > + .formats_rdi = &vfe_formats_rdi_845, > + .formats_pix = &vfe_formats_pix_845 > + } > + }, > + /* VFE1 */ > + { > + .regulators = {}, > + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", > + "vfe1", "vfe1_axi"}, > + .clock_rate = { { 0 }, > + { 400000000 }, > + { 80000000 }, > + { 37500000, 40000000 }, > + { 360000000, 432000000, 540000000, 600000000 }, > + { 265000000, 426000000 } }, > + .reg = { "vfe1" }, > + .interrupt = { "vfe1" }, > + .vfe = { > + .line_num = 3, > + .is_lite = false, > + .has_pd = true, > + .pd_name = "ife1", > + .hw_ops = &vfe_ops_170, > + .formats_rdi = &vfe_formats_rdi_845, > + .formats_pix = &vfe_formats_pix_845 > + } > + }, > + /* VFE2 */ > + { > + .regulators = {}, > + .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb", > + "vfe_lite" }, > + .clock_rate = { { 0 }, > + { 400000000 }, > + { 80000000 }, > + { 37500000, 40000000 }, > + { 360000000, 432000000, 540000000, 600000000 } }, > + .reg = { "vfe_lite" }, > + .interrupt = { "vfe_lite" }, > + .vfe = { > + .line_num = 4, > + .is_lite = true, > + .hw_ops = &vfe_ops_170, > + .formats_rdi = &vfe_formats_rdi_845, > + .formats_pix = &vfe_formats_pix_845 > + } > + }, > +}; > + > +static const struct resources_icc icc_res_sm6150[] = { > + { > + .name = "ahb", > + .icc_bw_tbl.avg = 38400, > + .icc_bw_tbl.peak = 76800, > + }, > + { > + .name = "hf_mnoc", > + .icc_bw_tbl.avg = 2097152, > + .icc_bw_tbl.peak = 2097152, > + }, > +}; > + > static const struct camss_subdev_resources csiphy_res_8250[] = { > /* CSIPHY0 */ > { > @@ -4438,6 +4610,19 @@ static const struct camss_resources sc7280_resources = { > .vfe_num = ARRAY_SIZE(vfe_res_7280), > }; > > +static const struct camss_resources sm6150_resources = { > + .version = CAMSS_6150, > + .pd_name = "top", > + .csiphy_res = csiphy_res_6150, > + .csid_res = csid_res_6150, > + .vfe_res = vfe_res_6150, > + .icc_res = icc_res_sm6150, > + .icc_path_num = ARRAY_SIZE(icc_res_sm6150), > + .csiphy_num = ARRAY_SIZE(csiphy_res_6150), > + .csid_num = ARRAY_SIZE(csid_res_6150), > + .vfe_num = ARRAY_SIZE(vfe_res_6150), > +}; > + > static const struct camss_resources sm8550_resources = { > .version = CAMSS_8550, > .pd_name = "top", > @@ -4478,6 +4663,7 @@ static const struct of_device_id camss_dt_match[] = { > { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, > { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, > { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, > + { .compatible = "qcom,sm6150-camss", .data = &sm6150_resources }, > { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, > { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources }, > { .compatible = "qcom,x1e80100-camss", .data = &x1e80100_resources }, > diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h > index a70fbc78ccc307c0abc2f3c834fb1e2dafd83c6b..b60556f2f226104adb48908bdb436f389fb1e1ad 100644 > --- a/drivers/media/platform/qcom/camss/camss.h > +++ b/drivers/media/platform/qcom/camss/camss.h > @@ -79,6 +79,7 @@ enum pm_domain { > enum camss_version { > CAMSS_660, > CAMSS_2290, > + CAMSS_6150, > CAMSS_7280, > CAMSS_8x16, > CAMSS_8x53, > --- bod ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] media: qcom: camss: add support for SM6150 camss 2025-10-16 10:29 ` Bryan O'Donoghue @ 2025-10-16 12:36 ` Wenmeng Liu 2025-10-16 13:55 ` Bryan O'Donoghue 0 siblings, 1 reply; 15+ messages in thread From: Wenmeng Liu @ 2025-10-16 12:36 UTC (permalink / raw) To: Bryan O'Donoghue, Wenmeng Liu, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/2025 6:29 PM, Bryan O'Donoghue wrote: > On 16/10/2025 11:22, Wenmeng Liu wrote: >> The camera subsystem for SM6150 which is based on Spectra 230. >> >> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > > Your commit log needs more detail. > > - VFE17x version what ? > - CSID version .. gen2 so CSID 480 is it ? > - CSIPHY process node would be nice > > Yes, will add more detail in next version. For SM6150, vfe and csid version is 170(vfe170, csid170), csiphy version is csiphy-v2.0. >> --- >> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 2 + >> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >> drivers/media/platform/qcom/camss/camss.c | 186 +++++++++++ >> ++++++++++ >> drivers/media/platform/qcom/camss/camss.h | 1 + >> 4 files changed, 191 insertions(+) >> >> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> index >> a229ba04b158739ddfe4076bdd28167a309f13ea..7bc524a9c4bbe3a316e366868e9d636e58d5956a 100644 >> --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> @@ -908,6 +908,7 @@ static bool csiphy_is_gen2(u32 version) >> switch (version) { >> case CAMSS_2290: >> + case CAMSS_6150: >> case CAMSS_7280: >> case CAMSS_8250: >> case CAMSS_8280XP: >> @@ -996,6 +997,7 @@ static int csiphy_init(struct csiphy_device *csiphy) >> regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845); >> break; >> case CAMSS_2290: >> + case CAMSS_6150: >> regs->lane_regs = &lane_regs_qcm2290[0]; > > You don't need to specify the array index for that. > Here I have only added "case CAMSS_6150:", then do I need to modify the part of "&lane_regs_qcm2290[0]"? >> regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290); >> break; Best regards, Wenmeng B ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] media: qcom: camss: add support for SM6150 camss 2025-10-16 12:36 ` Wenmeng Liu @ 2025-10-16 13:55 ` Bryan O'Donoghue 0 siblings, 0 replies; 15+ messages in thread From: Bryan O'Donoghue @ 2025-10-16 13:55 UTC (permalink / raw) To: Wenmeng Liu, Wenmeng Liu, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 16/10/2025 13:36, Wenmeng Liu wrote: >>> + case CAMSS_6150: >>> regs->lane_regs = &lane_regs_qcm2290[0]; >> You don't need to specify the array index for that. >> > Here I have only added "case CAMSS_6150:", then do I need to modify the > part of "&lane_regs_qcm2290[0]"? Hmm no I'm wrong - again. Please don't be afraid to call people out on being wrong - like I am now. Existing code is: case CAMSS_X1E80100: regs->lane_regs = &lane_regs_x1e80100[0]; regs->lane_array_size = ARRAY_SIZE(lane_regs_x1e80100); regs->offset = 0x1000; break; case CAMSS_8550: regs->lane_regs = &lane_regs_sm8550[0]; regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550); regs->offset = 0x1000; Your comment is consistent with existing code. You may ignore the previous statement. --- bod ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] media: qcom: camss: add support for SM6150 camss 2025-10-16 10:22 ` [PATCH 2/3] media: qcom: camss: add support for SM6150 camss Wenmeng Liu 2025-10-16 10:29 ` Bryan O'Donoghue @ 2025-10-16 13:43 ` Vladimir Zapolskiy 1 sibling, 0 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2025-10-16 13:43 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/25 13:22, Wenmeng Liu wrote: > The camera subsystem for SM6150 which is based on Spectra 230. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > --- <snip> > > +static const struct camss_subdev_resources csiphy_res_6150[] = { For the names of resource arrays please use a valid SoC name like it's been done for x1e80100, here it would be good to have sm6150 suffix. > + /* CSIPHY0 */ > + { > + .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, > + .clock = { "csiphy0", "csiphy0_timer" }, > + .clock_rate = { { 269333333, 384000000 }, > + { 269333333 } }, > + .reg = { "csiphy0" }, > + .interrupt = { "csiphy0" }, > + .csiphy = { You shall add .id field to all .csiphy structs. > + .hw_ops = &csiphy_ops_3ph_1_0, > + .formats = &csiphy_formats_sdm845 > + } > + }, In general the change looks good, after the fix please feel free to add a tag from me: Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node 2025-10-16 10:22 [PATCH 0/3] media: qcom: camss: Add sm6150 camss support Wenmeng Liu 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu 2025-10-16 10:22 ` [PATCH 2/3] media: qcom: camss: add support for SM6150 camss Wenmeng Liu @ 2025-10-16 10:22 ` Wenmeng Liu 2025-10-16 13:48 ` Vladimir Zapolskiy 2 siblings, 1 reply; 15+ messages in thread From: Wenmeng Liu @ 2025-10-16 10:22 UTC (permalink / raw) To: Robert Foss, Todor Tomov, Bryan O'Donoghue, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Wenmeng Liu, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel Add node for the SM6150 camera subsystem. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/sm6150.dtsi | 121 +++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index 3d2a1cb02b628a5db7ca14bea784429be5a020f9..ebfb336439b4fdfa567c0e011cd4da88a6290dfd 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -3646,6 +3646,127 @@ videocc: clock-controller@ab00000 { #power-domain-cells = <1>; }; + camss: isp@acb3000 { + compatible = "qcom,sm6150-camss"; + + reg = <0x0 0x0acb3000 0x0 0x1000>, + <0x0 0x0acba000 0x0 0x1000>, + <0x0 0x0acc8000 0x0 0x1000>, + <0x0 0x0ac65000 0x0 0x1000>, + <0x0 0x0ac66000 0x0 0x1000>, + <0x0 0x0ac67000 0x0 0x1000>, + <0x0 0x0acaf000 0x0 0x4000>, + <0x0 0x0acb6000 0x0 0x4000>, + <0x0 0x0acc4000 0x0 0x4000>; + reg-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_axi_hf", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe0_csid", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe1_csid", + "vfe_lite", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_mnoc"; + + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csid0", + "csid1", + "csid_lite", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + iommus = <&apps_smmu 0x820 0x40>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,qcs615-camcc"; reg = <0 0x0ad00000 0 0x10000>; -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node 2025-10-16 10:22 ` [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node Wenmeng Liu @ 2025-10-16 13:48 ` Vladimir Zapolskiy 2025-10-22 16:02 ` Konrad Dybcio 2025-11-02 17:47 ` Bjorn Andersson 0 siblings, 2 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2025-10-16 13:48 UTC (permalink / raw) To: Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/25 13:22, Wenmeng Liu wrote: > Add node for the SM6150 camera subsystem. > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/sm6150.dtsi | 121 +++++++++++++++++++++++++++++++++++ > 1 file changed, 121 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi > index 3d2a1cb02b628a5db7ca14bea784429be5a020f9..ebfb336439b4fdfa567c0e011cd4da88a6290dfd 100644 > --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi > @@ -3646,6 +3646,127 @@ videocc: clock-controller@ab00000 { > #power-domain-cells = <1>; > }; > > + camss: isp@acb3000 { > + compatible = "qcom,sm6150-camss"; > + > + reg = <0x0 0x0acb3000 0x0 0x1000>, > + <0x0 0x0acba000 0x0 0x1000>, > + <0x0 0x0acc8000 0x0 0x1000>, > + <0x0 0x0ac65000 0x0 0x1000>, > + <0x0 0x0ac66000 0x0 0x1000>, > + <0x0 0x0ac67000 0x0 0x1000>, > + <0x0 0x0acaf000 0x0 0x4000>, > + <0x0 0x0acb6000 0x0 0x4000>, > + <0x0 0x0acc4000 0x0 0x4000>; > + reg-names = "csid0", > + "csid1", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "vfe0", > + "vfe1", > + "vfe_lite"; > + > + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, > + <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CSIPHY0_CLK>, > + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY1_CLK>, > + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY2_CLK>, > + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > + <&gcc GCC_CAMERA_HF_AXI_CLK>, > + <&camcc CAM_CC_SOC_AHB_CLK>, > + <&camcc CAM_CC_IFE_0_CLK>, > + <&camcc CAM_CC_IFE_0_AXI_CLK>, > + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_0_CSID_CLK>, > + <&camcc CAM_CC_IFE_1_CLK>, > + <&camcc CAM_CC_IFE_1_AXI_CLK>, > + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_1_CSID_CLK>, > + <&camcc CAM_CC_IFE_LITE_CLK>, > + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; > + > + clock-names = "camnoc_axi", > + "cpas_ahb", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "gcc_axi_hf", > + "soc_ahb", > + "vfe0", > + "vfe0_axi", > + "vfe0_cphy_rx", > + "vfe0_csid", > + "vfe1", > + "vfe1_axi", > + "vfe1_cphy_rx", > + "vfe1_csid", > + "vfe_lite", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_mnoc"; > + > + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csid0", > + "csid1", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "vfe0", > + "vfe1", > + "vfe_lite"; > + > + iommus = <&apps_smmu 0x820 0x40>; > + > + power-domains = <&camcc IFE_0_GDSC>, > + <&camcc IFE_1_GDSC>, > + <&camcc TITAN_TOP_GDSC>; > + power-domain-names = "ife0", > + "ife1", > + "top"; > + > + status = "disabled"; Please remove empty lines between properties all above. > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + }; > + > + port@1 { > + reg = <1>; > + }; > + > + port@2 { > + reg = <2>; > + }; > + }; > + }; > + > camcc: clock-controller@ad00000 { > compatible = "qcom,qcs615-camcc"; > reg = <0 0x0ad00000 0 0x10000>; > Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node 2025-10-16 13:48 ` Vladimir Zapolskiy @ 2025-10-22 16:02 ` Konrad Dybcio 2025-11-02 17:47 ` Bjorn Andersson 1 sibling, 0 replies; 15+ messages in thread From: Konrad Dybcio @ 2025-10-22 16:02 UTC (permalink / raw) To: Vladimir Zapolskiy, Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 10/16/25 3:48 PM, Vladimir Zapolskiy wrote: > On 10/16/25 13:22, Wenmeng Liu wrote: >> Add node for the SM6150 camera subsystem. >> >> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> >> --- [...] >> + power-domains = <&camcc IFE_0_GDSC>, >> + <&camcc IFE_1_GDSC>, >> + <&camcc TITAN_TOP_GDSC>; >> + power-domain-names = "ife0", >> + "ife1", >> + "top"; >> + >> + status = "disabled"; > > Please remove empty lines between properties all above. What?? Konrad ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node 2025-10-16 13:48 ` Vladimir Zapolskiy 2025-10-22 16:02 ` Konrad Dybcio @ 2025-11-02 17:47 ` Bjorn Andersson 1 sibling, 0 replies; 15+ messages in thread From: Bjorn Andersson @ 2025-11-02 17:47 UTC (permalink / raw) To: Vladimir Zapolskiy Cc: Wenmeng Liu, Robert Foss, Todor Tomov, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Konrad Dybcio, linux-media, linux-arm-msm, devicetree, linux-kernel On Thu, Oct 16, 2025 at 04:48:02PM +0300, Vladimir Zapolskiy wrote: > On 10/16/25 13:22, Wenmeng Liu wrote: > > Add node for the SM6150 camera subsystem. > > > > Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> > > --- > > arch/arm64/boot/dts/qcom/sm6150.dtsi | 121 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 121 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi > > index 3d2a1cb02b628a5db7ca14bea784429be5a020f9..ebfb336439b4fdfa567c0e011cd4da88a6290dfd 100644 > > --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi > > @@ -3646,6 +3646,127 @@ videocc: clock-controller@ab00000 { > > #power-domain-cells = <1>; > > }; > > + camss: isp@acb3000 { > > + compatible = "qcom,sm6150-camss"; > > + > > + reg = <0x0 0x0acb3000 0x0 0x1000>, > > + <0x0 0x0acba000 0x0 0x1000>, > > + <0x0 0x0acc8000 0x0 0x1000>, > > + <0x0 0x0ac65000 0x0 0x1000>, > > + <0x0 0x0ac66000 0x0 0x1000>, > > + <0x0 0x0ac67000 0x0 0x1000>, > > + <0x0 0x0acaf000 0x0 0x4000>, > > + <0x0 0x0acb6000 0x0 0x4000>, > > + <0x0 0x0acc4000 0x0 0x4000>; > > + reg-names = "csid0", > > + "csid1", > > + "csid_lite", > > + "csiphy0", > > + "csiphy1", > > + "csiphy2", > > + "vfe0", > > + "vfe1", > > + "vfe_lite"; > > + > > + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, > > + <&camcc CAM_CC_CPAS_AHB_CLK>, > > + <&camcc CAM_CC_CSIPHY0_CLK>, > > + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > > + <&camcc CAM_CC_CSIPHY1_CLK>, > > + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > > + <&camcc CAM_CC_CSIPHY2_CLK>, > > + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > > + <&gcc GCC_CAMERA_HF_AXI_CLK>, > > + <&camcc CAM_CC_SOC_AHB_CLK>, > > + <&camcc CAM_CC_IFE_0_CLK>, > > + <&camcc CAM_CC_IFE_0_AXI_CLK>, > > + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, > > + <&camcc CAM_CC_IFE_0_CSID_CLK>, > > + <&camcc CAM_CC_IFE_1_CLK>, > > + <&camcc CAM_CC_IFE_1_AXI_CLK>, > > + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, > > + <&camcc CAM_CC_IFE_1_CSID_CLK>, > > + <&camcc CAM_CC_IFE_LITE_CLK>, > > + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, > > + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; > > + > > + clock-names = "camnoc_axi", > > + "cpas_ahb", > > + "csiphy0", > > + "csiphy0_timer", > > + "csiphy1", > > + "csiphy1_timer", > > + "csiphy2", > > + "csiphy2_timer", > > + "gcc_axi_hf", > > + "soc_ahb", > > + "vfe0", > > + "vfe0_axi", > > + "vfe0_cphy_rx", > > + "vfe0_csid", > > + "vfe1", > > + "vfe1_axi", > > + "vfe1_cphy_rx", > > + "vfe1_csid", > > + "vfe_lite", > > + "vfe_lite_cphy_rx", > > + "vfe_lite_csid"; > > + > > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > > + <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS > > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > > + interconnect-names = "ahb", > > + "hf_mnoc"; > > + > > + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>; > > + interrupt-names = "csid0", > > + "csid1", > > + "csid_lite", > > + "csiphy0", > > + "csiphy1", > > + "csiphy2", > > + "vfe0", > > + "vfe1", > > + "vfe_lite"; > > + > > + iommus = <&apps_smmu 0x820 0x40>; > > + > > + power-domains = <&camcc IFE_0_GDSC>, > > + <&camcc IFE_1_GDSC>, > > + <&camcc TITAN_TOP_GDSC>; > > + power-domain-names = "ife0", > > + "ife1", > > + "top"; > > + > > + status = "disabled"; > > Please remove empty lines between properties all above. > The empty lines between groups of properties makes this massive chunk of properties easier to read, at no real cost. The one exception is the extra empty line between clocks and clock-names, but there's no need to resubmit for that. Regards, Bjorn > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + }; > > + }; > > + }; > > + > > camcc: clock-controller@ad00000 { > > compatible = "qcom,qcs615-camcc"; > > reg = <0 0x0ad00000 0 0x10000>; > > > > Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > > -- > Best wishes, > Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2025-11-02 17:44 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-16 10:22 [PATCH 0/3] media: qcom: camss: Add sm6150 camss support Wenmeng Liu 2025-10-16 10:22 ` [PATCH 1/3] media: dt-bindings: Add qcom,sm6150-camss Wenmeng Liu 2025-10-16 10:43 ` Bryan O'Donoghue 2025-10-16 13:00 ` Wenmeng Liu 2025-10-16 13:31 ` Vladimir Zapolskiy 2025-10-28 9:49 ` Krzysztof Kozlowski 2025-10-16 10:22 ` [PATCH 2/3] media: qcom: camss: add support for SM6150 camss Wenmeng Liu 2025-10-16 10:29 ` Bryan O'Donoghue 2025-10-16 12:36 ` Wenmeng Liu 2025-10-16 13:55 ` Bryan O'Donoghue 2025-10-16 13:43 ` Vladimir Zapolskiy 2025-10-16 10:22 ` [PATCH 3/3] arm64: dts: qcom: sm6150: Add camss node Wenmeng Liu 2025-10-16 13:48 ` Vladimir Zapolskiy 2025-10-22 16:02 ` Konrad Dybcio 2025-11-02 17:47 ` Bjorn Andersson
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