* [PATCH 1/2] dt-bindings: usb: dwc3: Add snps,ulpi-ext-vbus-drv quirk
2023-02-15 9:31 [PATCH 0/2] usb: dwc3: core: add external vBus supply support for ulpi phy Piyush Mehta
@ 2023-02-15 9:31 ` Piyush Mehta
2023-02-16 9:20 ` Krzysztof Kozlowski
2023-02-15 9:31 ` [PATCH 2/2] usb: dwc3: core: add external vBus supply support for ulpi phy Piyush Mehta
1 sibling, 1 reply; 4+ messages in thread
From: Piyush Mehta @ 2023-02-15 9:31 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, balbi, Thinh.Nguyen
Cc: linux-usb, devicetree, linux-kernel, michal.simek,
siva.durga.prasad.paladugu, git, Piyush Mehta
Some ULPI USB PHYs do not support an internal vBus supply, to drive the
CPEN pin properly, it requires configuration of the ULPI DRVVBUSEXTERNAL
bit of the USB ULPI PHY OTG_CTRL register.
Added 'snps,ulpi-ext-vbus-drv' DT property to configure the USB2 PHY to
drives VBUS with an external supply.
When the ULPIEXTVBUSDRV bit is set to '1' in the Global USB2 PHY
Configuration registers, PHY drive vBus with an external 5V supply source.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 6d78048c4613..4e4a2dfb77b1 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -246,6 +246,14 @@ properties:
of resume. This option is to support certain legacy ULPI PHYs.
type: boolean
+ snps,ulpi-ext-vbus-drv:
+ description:
+ Some ULPI USB PHY does not support internal VBUS supply, and driving
+ the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL
+ bit. When set, the xhci host will configure the USB2 PHY drives VBUS
+ with an external supply.
+ type: boolean
+
snps,is-utmi-l1-suspend:
description:
True when DWC3 asserts output signal utmi_l1_suspend_n, false when
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] usb: dwc3: core: add external vBus supply support for ulpi phy
2023-02-15 9:31 [PATCH 0/2] usb: dwc3: core: add external vBus supply support for ulpi phy Piyush Mehta
2023-02-15 9:31 ` [PATCH 1/2] dt-bindings: usb: dwc3: Add snps,ulpi-ext-vbus-drv quirk Piyush Mehta
@ 2023-02-15 9:31 ` Piyush Mehta
1 sibling, 0 replies; 4+ messages in thread
From: Piyush Mehta @ 2023-02-15 9:31 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, balbi, Thinh.Nguyen
Cc: linux-usb, devicetree, linux-kernel, michal.simek,
siva.durga.prasad.paladugu, git, Piyush Mehta
Some ULPI USB PHY does not support internal VBUS supply, to drive the CPEN
pin, which requires the configuration of the ULPI DRVVBUSEXTERNAL bit of
OTG_CTRL register.
Added 'snps,ulpi-ext-vbus-drv' a DT property to configure the USB2 PHY to
drive VBUS with an external supply, by setting the USB2 PHY ULPIEXTVBUSDRV
bit[:17] of the GUSB2PHYCFG register to drive VBUS with an external supply.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
---
drivers/usb/dwc3/core.c | 12 ++++++++++++
drivers/usb/dwc3/core.h | 4 ++++
2 files changed, 16 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 476b63618511..ed0ab90d3fac 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -800,6 +800,16 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
if (dwc->dis_u2_freeclk_exists_quirk || dwc->gfladj_refclk_lpm_sel)
reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+ /*
+ * Some ULPI USB PHY does not support internal VBUS supply, to drive
+ * the CPEN pin requires the configuration of the ULPI DRVVBUSEXTERNAL
+ * bit of OTG_CTRL register. Controller configures the USB2 PHY
+ * ULPIEXTVBUSDRV bit[17] of the GUSB2PHYCFG register to drive vBus
+ * with an external supply.
+ */
+ if (dwc->ulpi_ext_vbus_drv)
+ reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV;
+
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
return 0;
@@ -1553,6 +1563,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
"snps,dis-tx-ipgap-linecheck-quirk");
dwc->resume_hs_terminations = device_property_read_bool(dev,
"snps,resume-hs-terminations");
+ dwc->ulpi_ext_vbus_drv = device_property_read_bool(dev,
+ "snps,ulpi-ext-vbus-drv");
dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
"snps,parkmode-disable-ss-quirk");
dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev,
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 8f9959ba9fd4..9d5487b377b7 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -280,6 +280,7 @@
/* Global USB2 PHY Configuration Register */
#define DWC3_GUSB2PHYCFG_PHYSOFTRST BIT(31)
#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS BIT(30)
+#define DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV BIT(17)
#define DWC3_GUSB2PHYCFG_SUSPHY BIT(6)
#define DWC3_GUSB2PHYCFG_ULPI_UTMI BIT(4)
#define DWC3_GUSB2PHYCFG_ENBLSLPM BIT(8)
@@ -1100,6 +1101,8 @@ struct dwc3_scratchpad_array {
* check during HS transmit.
* @resume-hs-terminations: Set if we enable quirk for fixing improper crc
* generation after resume from suspend.
+ * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
+ * VBUS with an external supply.
* @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
* instances in park mode.
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
@@ -1316,6 +1319,7 @@ struct dwc3 {
unsigned dis_del_phy_power_chg_quirk:1;
unsigned dis_tx_ipgap_linecheck_quirk:1;
unsigned resume_hs_terminations:1;
+ unsigned ulpi_ext_vbus_drv:1;
unsigned parkmode_disable_ss_quirk:1;
unsigned gfladj_refclk_lpm_sel:1;
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread