* [PATCH 0/3] Enable thermal management on MSM8916 @ 2018-03-06 13:05 Amit Kucheria 2018-03-06 13:05 ` [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps Amit Kucheria 0 siblings, 1 reply; 8+ messages in thread From: Amit Kucheria @ 2018-03-06 13:05 UTC (permalink / raw) To: linux-arm-msm Cc: Alex Elder, Andy Gross, Arnd Bergmann, Gregory CLEMENT, Heiko Stuebner, Krzysztof Kozlowski, Rob Herring, Timur Tabi, Wei Xu, devicetree, linux-arm-kernel, linux-kernel, linux-soc Add DT entries to create cooling devices on MSM8916, enable the thermal sensor on the platform and turn on other cpufreq governors to make it easy for developers. This patchset requires http://patchwork.kernel.org/bundle/amitkucheria/8016-cpufreq-dts/ to be applied first to enable thermal functionality by cpu frequency throttling. Amit Kucheria (2): arm64: defconfig: enable thermal sensor on QCOM platforms arm64: defconfig: enable more cpufreq governors Rajendra Nayak (1): arm64: dts: msm8916: Add cpu cooling maps arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++ arch/arm64/configs/defconfig | 10 ++++++++++ 2 files changed, 41 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps 2018-03-06 13:05 [PATCH 0/3] Enable thermal management on MSM8916 Amit Kucheria @ 2018-03-06 13:05 ` Amit Kucheria 2018-03-06 14:43 ` Rob Herring [not found] ` <cover.1520398076.git.amit.kucheria@linaro.org> 0 siblings, 2 replies; 8+ messages in thread From: Amit Kucheria @ 2018-03-06 13:05 UTC (permalink / raw) To: linux-arm-msm Cc: Rajendra Nayak, Andy Gross, David Brown, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon, linux-soc, devicetree, linux-arm-kernel, linux-kernel From: Rajendra Nayak <rnayak@codeaurora.org> Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e468277..acac9e3 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/clock/qcom,gcc-msm8916.h> #include <dt-bindings/reset/qcom,gcc-msm8916.h> #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/thermal/thermal.h> / { model = "Qualcomm Technologies, Inc. MSM8916"; @@ -115,6 +116,10 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU1: cpu@1 { @@ -126,6 +131,10 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU2: cpu@2 { @@ -137,6 +146,10 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU3: cpu@3 { @@ -148,6 +161,10 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; L2_0: l2-cache { @@ -196,6 +213,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu-thermal1 { @@ -216,6 +240,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert1>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps 2018-03-06 13:05 ` [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps Amit Kucheria @ 2018-03-06 14:43 ` Rob Herring 2018-03-07 2:48 ` Viresh Kumar [not found] ` <cover.1520398076.git.amit.kucheria@linaro.org> 1 sibling, 1 reply; 8+ messages in thread From: Rob Herring @ 2018-03-06 14:43 UTC (permalink / raw) To: Amit Kucheria, Viresh Kumar Cc: linux-arm-msm, Rajendra Nayak, Andy Gross, David Brown, Mark Rutland, Catalin Marinas, Will Deacon, open list:ARM/QUALCOMM SUPPORT, devicetree, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE, linux-kernel@vger.kernel.org +Viresh On Tue, Mar 6, 2018 at 7:05 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote: > From: Rajendra Nayak <rnayak@codeaurora.org> > > Add cpu cooling maps for cpu passive trip points. The cpu cooling > device states are mapped to cpufreq based scaling frequencies. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index e468277..acac9e3 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -15,6 +15,7 @@ > #include <dt-bindings/clock/qcom,gcc-msm8916.h> > #include <dt-bindings/reset/qcom,gcc-msm8916.h> > #include <dt-bindings/clock/qcom,rpmcc.h> > +#include <dt-bindings/thermal/thermal.h> > > / { > model = "Qualcomm Technologies, Inc. MSM8916"; > @@ -115,6 +116,10 @@ > cpu-idle-states = <&CPU_SPC>; > clocks = <&apcs 0>; > operating-points-v2 = <&cpu_opp_table>; > + /* cooling options */ > + cooling-min-level = <0>; > + cooling-max-level = <7>; Viresh is working on removing these from the binding... > + #cooling-cells = <2>; > }; > > CPU1: cpu@1 { ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps 2018-03-06 14:43 ` Rob Herring @ 2018-03-07 2:48 ` Viresh Kumar 0 siblings, 0 replies; 8+ messages in thread From: Viresh Kumar @ 2018-03-07 2:48 UTC (permalink / raw) To: Rob Herring Cc: Mark Rutland, devicetree, Rajendra Nayak, linux-arm-msm, Will Deacon, linux-kernel@vger.kernel.org, Amit Kucheria, David Brown, Catalin Marinas, Andy Gross, open list:ARM/QUALCOMM SUPPORT, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE On Tue, Mar 6, 2018 at 8:13 PM, Rob Herring <robh+dt@kernel.org> wrote: > On Tue, Mar 6, 2018 at 7:05 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote: >> model = "Qualcomm Technologies, Inc. MSM8916"; >> @@ -115,6 +116,10 @@ >> cpu-idle-states = <&CPU_SPC>; >> clocks = <&apcs 0>; >> operating-points-v2 = <&cpu_opp_table>; >> + /* cooling options */ >> + cooling-min-level = <0>; >> + cooling-max-level = <7>; > > Viresh is working on removing these from the binding... Yep, just drop all cooling-{min|max}-level lines from your code. That is not used anywhere by the kernel. ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <cover.1520398076.git.amit.kucheria@linaro.org>]
* [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps [not found] ` <cover.1520398076.git.amit.kucheria@linaro.org> @ 2018-03-07 5:00 ` Amit Kucheria 2018-03-07 5:14 ` Viresh Kumar 0 siblings, 1 reply; 8+ messages in thread From: Amit Kucheria @ 2018-03-07 5:00 UTC (permalink / raw) To: linux-arm-msm Cc: Rajendra Nayak, Andy Gross, David Brown, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon, linux-soc, devicetree, linux-arm-kernel, linux-kernel From: Rajendra Nayak <rnayak@codeaurora.org> Add cpu cooling maps for cpu passive trip points. The cpu cooling device states are mapped to cpufreq based scaling frequencies. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e468277..66b318e 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/clock/qcom,gcc-msm8916.h> #include <dt-bindings/reset/qcom,gcc-msm8916.h> #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/thermal/thermal.h> / { model = "Qualcomm Technologies, Inc. MSM8916"; @@ -115,6 +116,7 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; CPU1: cpu@1 { @@ -126,6 +128,7 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; CPU2: cpu@2 { @@ -137,6 +140,7 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; CPU3: cpu@3 { @@ -148,6 +152,7 @@ cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; L2_0: l2-cache { @@ -196,6 +201,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu-thermal1 { @@ -216,6 +228,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert1>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps 2018-03-07 5:00 ` [PATCH v2] " Amit Kucheria @ 2018-03-07 5:14 ` Viresh Kumar 2018-03-07 11:26 ` Amit Kucheria 0 siblings, 1 reply; 8+ messages in thread From: Viresh Kumar @ 2018-03-07 5:14 UTC (permalink / raw) To: Amit Kucheria Cc: linux-arm-msm, Rajendra Nayak, Andy Gross, David Brown, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon, open list:ARM/QUALCOMM SUPPORT, devicetree, Linux ARM, Linux Kernel Mailing List On Wed, Mar 7, 2018 at 10:30 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote: > From: Rajendra Nayak <rnayak@codeaurora.org> > > Add cpu cooling maps for cpu passive trip points. The cpu cooling > device states are mapped to cpufreq based scaling frequencies. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index e468277..66b318e 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -15,6 +15,7 @@ > #include <dt-bindings/clock/qcom,gcc-msm8916.h> > #include <dt-bindings/reset/qcom,gcc-msm8916.h> > #include <dt-bindings/clock/qcom,rpmcc.h> > +#include <dt-bindings/thermal/thermal.h> > > / { > model = "Qualcomm Technologies, Inc. MSM8916"; > @@ -115,6 +116,7 @@ > cpu-idle-states = <&CPU_SPC>; > clocks = <&apcs 0>; > operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; LGTM. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps 2018-03-07 5:14 ` Viresh Kumar @ 2018-03-07 11:26 ` Amit Kucheria 2018-03-08 4:58 ` Viresh Kumar 0 siblings, 1 reply; 8+ messages in thread From: Amit Kucheria @ 2018-03-07 11:26 UTC (permalink / raw) To: Viresh Kumar Cc: linux-arm-msm, Rajendra Nayak, Andy Gross, David Brown, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon, open list:ARM/QUALCOMM SUPPORT, DTML, Linux ARM, Linux Kernel Mailing List On Wed, Mar 7, 2018 at 10:44 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > On Wed, Mar 7, 2018 at 10:30 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote: >> From: Rajendra Nayak <rnayak@codeaurora.org> >> >> Add cpu cooling maps for cpu passive trip points. The cpu cooling >> device states are mapped to cpufreq based scaling frequencies. >> >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> >> --- >> arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi >> index e468277..66b318e 100644 >> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi >> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi >> @@ -15,6 +15,7 @@ >> #include <dt-bindings/clock/qcom,gcc-msm8916.h> >> #include <dt-bindings/reset/qcom,gcc-msm8916.h> >> #include <dt-bindings/clock/qcom,rpmcc.h> >> +#include <dt-bindings/thermal/thermal.h> >> >> / { >> model = "Qualcomm Technologies, Inc. MSM8916"; >> @@ -115,6 +116,7 @@ >> cpu-idle-states = <&CPU_SPC>; >> clocks = <&apcs 0>; >> operating-points-v2 = <&cpu_opp_table>; >> + #cooling-cells = <2>; > > LGTM. Can I take that as a Reviewed-by? ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps 2018-03-07 11:26 ` Amit Kucheria @ 2018-03-08 4:58 ` Viresh Kumar 0 siblings, 0 replies; 8+ messages in thread From: Viresh Kumar @ 2018-03-08 4:58 UTC (permalink / raw) To: Amit Kucheria Cc: Mark Rutland, DTML, Rajendra Nayak, linux-arm-msm, Will Deacon, Linux Kernel Mailing List, David Brown, Rob Herring, Catalin Marinas, Andy Gross, open list:ARM/QUALCOMM SUPPORT, Linux ARM On 07-03-18, 16:56, Amit Kucheria wrote: > On Wed, Mar 7, 2018 at 10:44 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > > On Wed, Mar 7, 2018 at 10:30 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote: > >> From: Rajendra Nayak <rnayak@codeaurora.org> > >> > >> Add cpu cooling maps for cpu passive trip points. The cpu cooling > >> device states are mapped to cpufreq based scaling frequencies. > >> > >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > >> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > >> --- > >> arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++ > >> 1 file changed, 19 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > >> index e468277..66b318e 100644 > >> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > >> @@ -15,6 +15,7 @@ > >> #include <dt-bindings/clock/qcom,gcc-msm8916.h> > >> #include <dt-bindings/reset/qcom,gcc-msm8916.h> > >> #include <dt-bindings/clock/qcom,rpmcc.h> > >> +#include <dt-bindings/thermal/thermal.h> > >> > >> / { > >> model = "Qualcomm Technologies, Inc. MSM8916"; > >> @@ -115,6 +116,7 @@ > >> cpu-idle-states = <&CPU_SPC>; > >> clocks = <&apcs 0>; > >> operating-points-v2 = <&cpu_opp_table>; > >> + #cooling-cells = <2>; > > > > LGTM. > > Can I take that as a Reviewed-by? Sure. Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> -- viresh ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-03-08 4:58 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-03-06 13:05 [PATCH 0/3] Enable thermal management on MSM8916 Amit Kucheria 2018-03-06 13:05 ` [PATCH 1/3] arm64: dts: msm8916: Add cpu cooling maps Amit Kucheria 2018-03-06 14:43 ` Rob Herring 2018-03-07 2:48 ` Viresh Kumar [not found] ` <cover.1520398076.git.amit.kucheria@linaro.org> 2018-03-07 5:00 ` [PATCH v2] " Amit Kucheria 2018-03-07 5:14 ` Viresh Kumar 2018-03-07 11:26 ` Amit Kucheria 2018-03-08 4:58 ` Viresh Kumar
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