From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sai Prakash Ranjan Subject: [PATCHv2 0/2] coresight: Do not default to CPU0 for missing CPU phandle Date: Fri, 21 Jun 2019 00:01:50 +0530 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Mathieu Poirier , Suzuki K Poulose , Leo Yan , Rob Herring , devicetree@vger.kernel.org, Alexander Shishkin , Andy Gross , David Brown , Mark Rutland Cc: Sai Prakash Ranjan , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sibi Sankar , Vivek Gautam , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org In case of missing CPU phandle, the affinity is set default to CPU0 which is not a correct assumption. Fix this in coresight platform to set affinity to invalid and abort the probe in drivers. Also update the dt-bindings accordingly. Patch 2 allows the probe of coresight etm and cpu-debug to abort earlier in case cpus are not available. v2: * Addressed review comments from Suzuki and Mathieu. * Allows the probe of etm and cpu-debug to abort earlier in case of unavailability of respective cpus. Sai Prakash Ranjan (2): coresight: Do not default to CPU0 for missing CPU phandle coresight: Abort probe if cpus are not available Documentation/devicetree/bindings/arm/coresight.txt | 2 +- drivers/hwtracing/coresight/coresight-cpu-debug.c | 3 +++ drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++ drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++ drivers/hwtracing/coresight/coresight-platform.c | 13 ++++++++----- 5 files changed, 18 insertions(+), 6 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation