From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sai Prakash Ranjan Subject: [PATCHv5 0/2] coresight: Do not default to CPU0 for missing CPU phandle Date: Thu, 27 Jun 2019 23:45:27 +0530 Message-ID: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Mathieu Poirier , Suzuki K Poulose , Rob Herring , devicetree@vger.kernel.org, Leo Yan , Alexander Shishkin , David Brown , Mark Rutland Cc: Rajendra Nayak , Vivek Gautam , Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan List-Id: devicetree@vger.kernel.org In case of missing CPU phandle, the affinity is set default to CPU0 which is not a correct assumption. Fix this in coresight platform to set affinity to invalid and abort the probe in drivers. Also update the dt-bindings accordingly. v5: * Separate out the dt-bindings patch. v4: * Fix return for !CONFIG_ACPI and !CONFIG_OF. v3: * Addressed review comments from Suzuki and updated acpi_coresight_get_cpu. * Removed patch 2 which had invalid check for online cpus. v2: * Addressed review comments from Suzuki and Mathieu. * Allows the probe of etm and cpu-debug to abort earlier in case of unavailability of respective cpus. Sai Prakash Ranjan (2): dt-bindings: coresight: Change CPU phandle to required property coresight: Do not default to CPU0 for missing CPU phandle .../bindings/arm/coresight-cpu-debug.txt | 4 ++-- .../devicetree/bindings/arm/coresight.txt | 8 +++++--- .../hwtracing/coresight/coresight-cpu-debug.c | 3 +++ drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++ drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++ .../hwtracing/coresight/coresight-platform.c | 20 +++++++++---------- 6 files changed, 26 insertions(+), 15 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation