* [PATCH 1/3] ARM: dts: NSP: Add common bindings for Meraki MX64/65
2020-06-02 16:11 [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Matthew Hagan
@ 2020-06-02 16:11 ` Matthew Hagan
2020-06-02 16:11 ` [PATCH 2/3] ARM: dts: NSP: Add support for Cisco Meraki MX64(W) Matthew Hagan
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Matthew Hagan @ 2020-06-02 16:11 UTC (permalink / raw)
Cc: Matthew Hagan, Florian Fainelli, Rob Herring, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, devicetree,
linux-arm-kernel
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
arch/arm/boot/dts/bcm958625-mx6x-common.dtsi | 172 +++++++++++++++++++
1 file changed, 172 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-mx6x-common.dtsi
diff --git a/arch/arm/boot/dts/bcm958625-mx6x-common.dtsi b/arch/arm/boot/dts/bcm958625-mx6x-common.dtsi
new file mode 100644
index 000000000000..1e253dd0941a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx6x-common.dtsi
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices.
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm-nsp.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x60000000 0x80000000>;
+ };
+
+ pwm-leds {
+ compatible = "pwm-leds";
+
+ red {
+ label = "pwm:led:red";
+ pwms = <&pwm 1 50000>;
+ };
+
+ green {
+ label = "pwm:led:green";
+ pwms = <&pwm 2 50000>;
+ };
+
+ blue {
+ label = "pwm:led:blue";
+ pwms = <&pwm 3 50000>;
+ };
+ };
+};
+
+&L2 {
+ arm,io-coherent;
+ prefetch-data = <1>;
+ prefetch-instr = <1>;
+};
+
+&uart0 {
+ clock-frequency = <62500000>;
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ eeprom: at24@50 {
+ compatible = "atmel,24c64";
+ pagesize = <32>;
+ reg = <0x50>;
+ };
+};
+
+&amac2 {
+ status = "okay";
+};
+
+&nand {
+ nandcs@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <1024>;
+
+ brcm,nand-oob-sector-size = <27>;
+
+ partition@0 {
+ label = "U-boot";
+ reg = <0x00 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "Shmoo";
+ reg = <0x80000 0x80000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "bootkernel1";
+ reg = <0x100000 0x300000>;
+ };
+
+ partition@400000 {
+ label = "senao_nvram";
+ reg = <0x400000 0x100000>;
+ };
+
+ partition@500000 {
+ label = "bootkernel2";
+ reg = <0x500000 0x300000>;
+ };
+
+ partition@800000 {
+ label = "ubi";
+ reg = <0x800000 0x3f700000>;
+ };
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pwm {
+ status = "okay";
+ #pwm-cells = <2>;
+ chan0 {
+ channel = <1>;
+ active_low = <1>;
+ };
+ chan1 {
+ channel = <2>;
+ active_low = <1>;
+ };
+ chan2 {
+ channel = <3>;
+ active_low = <1>;
+ };
+};
+
+&ccbtimer1 {
+ status = "disabled";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_sel>, <&gpiobs>, <&pwmc>;
+
+ nand_sel: nand_sel {
+ function = "nand";
+ groups = "nand_grp";
+ };
+
+ gpiobs: gpiobs {
+ function = "gpio_b";
+ groups = "gpio_b_0_grp", "gpio_b_1_grp", "gpio_b_2_grp",
+ "gpio_b_3_grp";
+ };
+
+ pwmc: pwmc {
+ function = "pwm";
+ groups = "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp";
+ };
+
+ i2c_sel: i2c {
+ function = "i2c";
+ groups = "i2c_grp";
+ };
+};
+
+&sata_phy {
+ status = "disabled";
+};
--
2.25.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] ARM: dts: NSP: Add support for Cisco Meraki MX64(W)
2020-06-02 16:11 [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Matthew Hagan
2020-06-02 16:11 ` [PATCH 1/3] ARM: dts: NSP: Add common bindings for Meraki MX64/65 Matthew Hagan
@ 2020-06-02 16:11 ` Matthew Hagan
2020-06-02 16:11 ` [PATCH 3/3] ARM: dts: NSP: Add support for Cisco Meraki MX65(W) Matthew Hagan
2020-06-02 21:55 ` [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Florian Fainelli
3 siblings, 0 replies; 5+ messages in thread
From: Matthew Hagan @ 2020-06-02 16:11 UTC (permalink / raw)
Cc: Matthew Hagan, Florian Fainelli, Rob Herring, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, devicetree,
linux-arm-kernel
Hardware Info
-------------
Processor - Broadcom BCM58625 dual-core @ 1.2 GHz
DDR3 RAM - 2GB (4x SK Hynix H5TC4G83CFR)
Flash - 1GB (Micron MT29F8G08ABACA)
Switch - Broadcom BCM58625
Wireless(MX64W) - Broadcom BCM43520KMLG (2x)
Ports - 5 Ports
Serial Port - 115200 8n1
USB - 1x 2.0
Tested with Kernel 5.4. PCIe is inactive on the non-wireless MX64.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
arch/arm/boot/dts/bcm958625-mx64.dts | 15 +++
arch/arm/boot/dts/bcm958625-mx64w.dts | 23 +++++
arch/arm/boot/dts/bcm958625-mx64x.dtsi | 136 +++++++++++++++++++++++++
3 files changed, 174 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-mx64.dts
create mode 100644 arch/arm/boot/dts/bcm958625-mx64w.dts
create mode 100644 arch/arm/boot/dts/bcm958625-mx64x.dtsi
diff --git a/arch/arm/boot/dts/bcm958625-mx64.dts b/arch/arm/boot/dts/bcm958625-mx64.dts
new file mode 100644
index 000000000000..ec1017b8bf68
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx64.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64.
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx64x.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64";
+ compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
+};
diff --git a/arch/arm/boot/dts/bcm958625-mx64w.dts b/arch/arm/boot/dts/bcm958625-mx64w.dts
new file mode 100644
index 000000000000..a3fbf0fed218
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx64w.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64W.
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx64x.dtsi"
+
+/ {
+ model = "Cisco Meraki MX64W";
+ compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625-mx64x.dtsi b/arch/arm/boot/dts/bcm958625-mx64x.dtsi
new file mode 100644
index 000000000000..4be3dd314beb
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx64x.dtsi
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx6x-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ leds {
+ compatible = "gpio-leds";
+
+ power_orange {
+ label = "power:orange";
+ gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ lan1_right {
+ label = "lan1:right";
+ gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
+ };
+
+ lan1_left {
+ label = "lan1:left";
+ gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
+ };
+
+ lan2_right {
+ label = "lan2:right";
+ gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
+ };
+
+ lan2_left {
+ label = "lan2:left";
+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
+ };
+
+ lan3_right {
+ label = "lan3:right";
+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
+ };
+
+ lan3_left {
+ label = "lan3:left";
+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
+ };
+
+ lan4_right {
+ label = "lan4:right";
+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
+ };
+
+ lan4_left {
+ label = "lan4:left";
+ gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
+ };
+
+ wan0_right {
+ label = "wan0:right";
+ gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
+ };
+
+ wan0_left {
+ label = "wan0:left";
+ gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
+ };
+
+ power_white {
+ label = "power:white";
+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ gpio-buttons {
+ compatible = "gpio-keys-polled";
+ autorepeat;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ label = "lan1";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "lan2";
+ reg = <1>;
+ };
+
+ port@2 {
+ label = "lan3";
+ reg = <2>;
+ };
+
+ port@3 {
+ label = "lan4";
+ reg = <3>;
+ };
+
+ port@4 {
+ label = "wan0";
+ reg = <4>;
+ };
+
+ port@8 {
+ ethernet = <&amac2>;
+ label = "cpu";
+ reg = <8>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--
2.25.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/3] ARM: dts: NSP: Add support for Cisco Meraki MX65(W)
2020-06-02 16:11 [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Matthew Hagan
2020-06-02 16:11 ` [PATCH 1/3] ARM: dts: NSP: Add common bindings for Meraki MX64/65 Matthew Hagan
2020-06-02 16:11 ` [PATCH 2/3] ARM: dts: NSP: Add support for Cisco Meraki MX64(W) Matthew Hagan
@ 2020-06-02 16:11 ` Matthew Hagan
2020-06-02 21:55 ` [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Florian Fainelli
3 siblings, 0 replies; 5+ messages in thread
From: Matthew Hagan @ 2020-06-02 16:11 UTC (permalink / raw)
Cc: Matthew Hagan, Florian Fainelli, Rob Herring, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, devicetree,
linux-arm-kernel
Hardware Info
-------------
Processor - Broadcom BCM58625 dual-core @ 1.2 GHz
DDR3 RAM - 2GB (4x SK Hynix H5TC4G83CFR)
Flash - 1GB (Micron MT29F8G08ABACA)
Switches - Broadcom BCM58625, 2x Qualcomm Atheros QCA8337
Ports - 12 Ports
Wireless(MX65W) - Broadcom BCM43520KMLG (2X)
Serial Port - 115200 8n1
USB - 1x 2.0
Tested with Kernel 5.4. PCIe is inactive on non-wireless MX65.
Note: The QCA8337 switches are connected to ports 4 and 5 of the BCM58625
SRAB, which need be set to SGMII mode.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
arch/arm/boot/dts/bcm958625-mx65.dts | 15 ++
arch/arm/boot/dts/bcm958625-mx65w.dts | 23 ++
arch/arm/boot/dts/bcm958625-mx65x.dtsi | 321 +++++++++++++++++++++++++
3 files changed, 359 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm958625-mx65.dts
create mode 100644 arch/arm/boot/dts/bcm958625-mx65w.dts
create mode 100644 arch/arm/boot/dts/bcm958625-mx65x.dtsi
diff --git a/arch/arm/boot/dts/bcm958625-mx65.dts b/arch/arm/boot/dts/bcm958625-mx65.dts
new file mode 100644
index 000000000000..af161d268824
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx65.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65.
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx65x.dtsi"
+
+/ {
+ model = "Cisco Meraki MX65";
+ compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp";
+};
diff --git a/arch/arm/boot/dts/bcm958625-mx65w.dts b/arch/arm/boot/dts/bcm958625-mx65w.dts
new file mode 100644
index 000000000000..67933ca7b598
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx65w.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65W.
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx65x.dtsi"
+
+/ {
+ model = "Cisco Meraki MX65W";
+ compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625-mx65x.dtsi b/arch/arm/boot/dts/bcm958625-mx65x.dtsi
new file mode 100644
index 000000000000..f69949be501e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625-mx65x.dtsi
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Bindings for Cisco Meraki MX65 series (Alamo).
+ *
+ * Copyright (C) 2020 Matthew Hagan <mnhagan88@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm958625-mx6x-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ aliases {
+ mdio-mux-mmio = &mdiomux0;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_orange {
+ label = "power:orange";
+ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ lan_leds {
+ label = "lan:leds";
+ gpios = <&gpioa 12 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan1_right {
+ label = "wan1:right";
+ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
+ };
+
+ wan1_left {
+ label = "wan1:left";
+ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
+ };
+
+ wan2_right {
+ label = "wan2:right";
+ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
+ };
+
+ wan2_left {
+ label = "wan2:left";
+ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
+ };
+
+ power_white {
+ label = "power:white";
+ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ gpio-buttons {
+ compatible = "gpio-keys-polled";
+ autorepeat;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ mdio: mdio@18032000 {
+ compatible = "brcm,iproc-mdio";
+ reg = <0x18032000 0x8>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
+
+ mdiomux0: mdio-mux {
+ compatible = "mdio-mux-mmioreg";
+ reg = <0x18032000 0x4>;
+ mux-mask = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio>;
+
+ mdio_int: mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ };
+ mdio_ext: mdio@200 {
+ reg = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ mdio-mii-mux {
+ compatible = "mdio-mux-mmioreg";
+ reg = <0x1803f1c0 0x4>;
+ mux-mask = <0x2000>;
+ mdio-parent-bus = <&mdio_ext>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port6: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port7: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port8: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port9: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port10: phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+ dsa,member = <1 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&sgmii1>;
+ phy-mode = "sgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan8";
+ phy-handle = <&phy_port6>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan9";
+ phy-handle = <&phy_port7>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan10";
+ phy-handle = <&phy_port8>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan11";
+ phy-handle = <&phy_port9>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan12";
+ phy-handle = <&phy_port10>;
+ };
+ };
+ };
+ };
+
+ mdio-mii@2000 {
+ reg = <0x2000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+ dsa,member = <2 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&sgmii0>;
+ phy-mode = "sgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan4";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan5";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan6";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan7";
+ phy-handle = <&phy_port5>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+ dsa,member = <0 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ label = "wan1";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "wan2";
+ reg = <1>;
+ };
+
+ sgmii0: port@4 {
+ label = "sw0";
+ reg = <4>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ sgmii1: port@5 {
+ label = "sw1";
+ reg = <5>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@8 {
+ ethernet = <&amac2>;
+ label = "cpu";
+ reg = <8>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
+&pinctrl {
+ mdio_sel: mdio {
+ function = "mdio";
+ groups = "mdio_grp";
+ };
+};
--
2.25.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices
2020-06-02 16:11 [PATCH 0/3] ARM: dts: NSP: Add support for Cisco Meraki NSP devices Matthew Hagan
` (2 preceding siblings ...)
2020-06-02 16:11 ` [PATCH 3/3] ARM: dts: NSP: Add support for Cisco Meraki MX65(W) Matthew Hagan
@ 2020-06-02 21:55 ` Florian Fainelli
3 siblings, 0 replies; 5+ messages in thread
From: Florian Fainelli @ 2020-06-02 21:55 UTC (permalink / raw)
To: Matthew Hagan
Cc: Rob Herring, Ray Jui, Scott Branden, bcm-kernel-feedback-list,
devicetree, linux-arm-kernel
Hi Matthew,
On 6/2/2020 9:11 AM, Matthew Hagan wrote:
> This patch set adds support for the Meraki MX64(W) and MX65(W) security
> devices. There are four devices in total, all using the same basic hardware.
>
> The MX64 series has five ethernet ports connected to the BCM SRAB. The MX65
> series has two ports conected to the SRAB, and two QCA8337 switches connected
> by SGMII to SRAB ports 4 and 5, each providing five additional ports.
>
> The W variants of these devices have two BCM43520s on the PCIe bus. On the
> non-wireless variants PCIe is inactive, hence separate dts files.
>
> 1/3 contains common bindings for both Meraki devices.
> 2/3 contains MX64 specific bindings.
> 3/3 contains MX65 specific bindings.
Glad to see those patches being submitted upstream to support those
devices, don't we need a change to arch/arm/boot/dts/Makefile to add
those DTS files to be built when ARCH_BCM_NSP is enabled?
>
> Note that Chris Packham's "[PATCH 2/2] ARM: dts: NSP: avoid unnecessary probe
> deferrals" is also necessary.
Humm, I am not sure this patch is really the way to go, but I have to
look at it again.
>
> Thanks,
> Matthew
>
> Matthew Hagan (3):
> ARM: dts: NSP: Add common bindings for Meraki MX64/65
> ARM: dts: NSP: Add support for Cisco Meraki MX64(W)
> ARM: dts: NSP: Add support for Cisco Meraki MX65(W)
>
> arch/arm/boot/dts/bcm958625-mx64.dts | 15 +
> arch/arm/boot/dts/bcm958625-mx64w.dts | 23 ++
> arch/arm/boot/dts/bcm958625-mx64x.dtsi | 136 ++++++++
> arch/arm/boot/dts/bcm958625-mx65.dts | 15 +
> arch/arm/boot/dts/bcm958625-mx65w.dts | 23 ++
> arch/arm/boot/dts/bcm958625-mx65x.dtsi | 321 +++++++++++++++++++
> arch/arm/boot/dts/bcm958625-mx6x-common.dtsi | 172 ++++++++++
> 7 files changed, 705 insertions(+)
> create mode 100644 arch/arm/boot/dts/bcm958625-mx64.dts
> create mode 100644 arch/arm/boot/dts/bcm958625-mx64w.dts
> create mode 100644 arch/arm/boot/dts/bcm958625-mx64x.dtsi
> create mode 100644 arch/arm/boot/dts/bcm958625-mx65.dts
> create mode 100644 arch/arm/boot/dts/bcm958625-mx65w.dts
> create mode 100644 arch/arm/boot/dts/bcm958625-mx65x.dtsi
> create mode 100644 arch/arm/boot/dts/bcm958625-mx6x-common.dtsi
>
--
Florian
^ permalink raw reply [flat|nested] 5+ messages in thread