[PATCH v2 0/4] riscv: sophgo: add reset support for SG2042

[PATCH v2 0/4] riscv: sophgo: add reset support for SG2042

[Chen Wang]

From: Chen Wang <unicorn_wang@outlook.com>

From: Chen Wang <unicorn_wang@outlook.com>

This series adds reset controller support for Sophgo SG2042 using
reset-simple driver.

Thanks,
Chen

---

Changes in v2:
  This patch series is based on v6.8-rc1.
  - fixed some minor formatting issues.
  Note that if you need to pass dtb check, you need to apply a patch. This
  patch is missing in v6.8-rc1. For details, please see [2].

Changes in v1:
  The patch series is based on v6.7. You can simply review or test the
  patches at the link [1].

Link: https://lore.kernel.org/linux-riscv/cover.1704790558.git.unicorn_wang@outlook.com/ [1]
Link: https://lore.kernel.org/linux-riscv/MA0P287MB28228572C526C5099A8BDA2DFE7B2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM/T/#u [2]

---

Chen Wang (4):
  dt-bindings: reset: sophgo: support SG2042
  reset: sophgo: add SG2042 reset generator driver
  riscv: dts: add reset generator for Sophgo SG2042 SoC
  riscv: dts: add resets property for uart node

 .../bindings/reset/sophgo,sg2042-reset.yaml   | 35 ++++++++
 arch/riscv/boot/dts/sophgo/sg2042.dtsi        |  9 ++
 drivers/reset/Kconfig                         |  1 +
 drivers/reset/reset-simple.c                  |  2 +
 drivers/reset/sophgo/Kconfig                  | 10 +++
 .../dt-bindings/reset/sophgo,sg2042-reset.h   | 87 +++++++++++++++++++
 6 files changed, 144 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
 create mode 100644 drivers/reset/sophgo/Kconfig
 create mode 100644 include/dt-bindings/reset/sophgo,sg2042-reset.h


base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
-- 
2.25.1

[PATCH v2 1/4] dt-bindings: reset: sophgo: support SG2042

[Chen Wang]

From: Chen Wang <unicorn_wang@outlook.com>

Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/reset/sophgo,sg2042-reset.yaml   | 35 ++++++++
 .../dt-bindings/reset/sophgo,sg2042-reset.h   | 87 +++++++++++++++++++
 2 files changed, 122 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
 create mode 100644 include/dt-bindings/reset/sophgo,sg2042-reset.h

diff --git a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
new file mode 100644
index 000000000000..76e1931f0908
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/sophgo,sg2042-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 SoC Reset Controller
+
+maintainers:
+  - Chen Wang <unicorn_wang@outlook.com>
+
+properties:
+  compatible:
+    const: sophgo,sg2042-reset
+
+  reg:
+    maxItems: 1
+
+  "#reset-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    rstgen: reset-controller@c00 {
+        compatible = "sophgo,sg2042-reset";
+        reg = <0xc00 0xc>;
+        #reset-cells = <1>;
+    };
diff --git a/include/dt-bindings/reset/sophgo,sg2042-reset.h b/include/dt-bindings/reset/sophgo,sg2042-reset.h
new file mode 100644
index 000000000000..9ab0980625c1
--- /dev/null
+++ b/include/dt-bindings/reset/sophgo,sg2042-reset.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_RESET_SOPHGO_SG2042_H_
+#define __DT_BINDINGS_RESET_SOPHGO_SG2042_H_
+
+#define RST_MAIN_AP			0
+#define RST_RISCV_CPU			1
+#define RST_RISCV_LOW_SPEED_LOGIC	2
+#define RST_RISCV_CMN			3
+#define RST_HSDMA			4
+#define RST_SYSDMA			5
+#define RST_EFUSE0			6
+#define RST_EFUSE1			7
+#define RST_RTC				8
+#define RST_TIMER			9
+#define RST_WDT				10
+#define RST_AHB_ROM0			11
+#define RST_AHB_ROM1			12
+#define RST_I2C0			13
+#define RST_I2C1			14
+#define RST_I2C2			15
+#define RST_I2C3			16
+#define RST_GPIO0			17
+#define RST_GPIO1			18
+#define RST_GPIO2			19
+#define RST_PWM				20
+#define RST_AXI_SRAM0			21
+#define RST_AXI_SRAM1			22
+#define RST_SF0				23
+#define RST_SF1				24
+#define RST_LPC				25
+#define RST_ETH0			26
+#define RST_EMMC			27
+#define RST_SD				28
+#define RST_UART0			29
+#define RST_UART1			30
+#define RST_UART2			31
+#define RST_UART3			32
+#define RST_SPI0			33
+#define RST_SPI1			34
+#define RST_DBG_I2C			35
+#define RST_PCIE0			36
+#define RST_PCIE1			37
+#define RST_DDR0			38
+#define RST_DDR1			39
+#define RST_DDR2			40
+#define RST_DDR3			41
+#define RST_FAU0			42
+#define RST_FAU1			43
+#define RST_FAU2			44
+#define RST_RXU0			45
+#define RST_RXU1			46
+#define RST_RXU2			47
+#define RST_RXU3			48
+#define RST_RXU4			49
+#define RST_RXU5			50
+#define RST_RXU6			51
+#define RST_RXU7			52
+#define RST_RXU8			53
+#define RST_RXU9			54
+#define RST_RXU10			55
+#define RST_RXU11			56
+#define RST_RXU12			57
+#define RST_RXU13			58
+#define RST_RXU14			59
+#define RST_RXU15			60
+#define RST_RXU16			61
+#define RST_RXU17			62
+#define RST_RXU18			63
+#define RST_RXU19			64
+#define RST_RXU20			65
+#define RST_RXU21			66
+#define RST_RXU22			67
+#define RST_RXU23			68
+#define RST_RXU24			69
+#define RST_RXU25			70
+#define RST_RXU26			71
+#define RST_RXU27			72
+#define RST_RXU28			73
+#define RST_RXU29			74
+#define RST_RXU30			75
+#define RST_RXU31			76
+
+#endif /* __DT_BINDINGS_RESET_SOPHGO_SG2042_H_ */
-- 
2.25.1

[PATCH v2 2/4] reset: sophgo: add SG2042 reset generator driver

[Chen Wang]

From: Chen Wang <unicorn_wang@outlook.com>

Reuse reset-simple driver for the Sophgo SG2042 reset generator.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---
 drivers/reset/Kconfig        |  1 +
 drivers/reset/reset-simple.c |  2 ++
 drivers/reset/sophgo/Kconfig | 10 ++++++++++
 3 files changed, 13 insertions(+)
 create mode 100644 drivers/reset/sophgo/Kconfig

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index ccd59ddd7610..09ba59cc4bc5 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -318,6 +318,7 @@ config RESET_ZYNQ
 	help
 	  This enables the reset controller driver for Xilinx Zynq SoCs.
 
+source "drivers/reset/sophgo/Kconfig"
 source "drivers/reset/starfive/Kconfig"
 source "drivers/reset/sti/Kconfig"
 source "drivers/reset/hisilicon/Kconfig"
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 818cabcc9fb7..276067839830 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -151,6 +151,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
 	{ .compatible = "snps,dw-high-reset" },
 	{ .compatible = "snps,dw-low-reset",
 		.data = &reset_simple_active_low },
+	{ .compatible = "sophgo,sg2042-reset",
+		.data = &reset_simple_active_low },
 	{ /* sentinel */ },
 };
 
diff --git a/drivers/reset/sophgo/Kconfig b/drivers/reset/sophgo/Kconfig
new file mode 100644
index 000000000000..9ad96e49e1dd
--- /dev/null
+++ b/drivers/reset/sophgo/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config RESET_SOPHGO_SG2042
+	bool "Sophgo SG2042 Reset Driver"
+	depends on ARCH_SOPHGO || COMPILE_TEST
+	select RESET_SIMPLE
+	default ARCH_SOPHGO
+	help
+	  This enables the reset controller driver for the Sophgo SG2042 SoC.
+
-- 
2.25.1

[PATCH v2 3/4] riscv: dts: add reset generator for Sophgo SG2042 SoC

[Chen Wang]

From: Chen Wang <unicorn_wang@outlook.com>

Add reset generator node to device tree for SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index 93256540d078..f59081d4f0ee 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -6,6 +6,8 @@
 /dts-v1/;
 #include <dt-bindings/interrupt-controller/irq.h>
 
+#include <dt-bindings/reset/sophgo,sg2042-reset.h>
+
 #include "sg2042-cpus.dtsi"
 
 / {
@@ -311,6 +313,12 @@ intc: interrupt-controller@7090000000 {
 			riscv,ndev = <224>;
 		};
 
+		rstgen: reset-controller@7030013000 {
+			compatible = "sophgo,sg2042-reset";
+			reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
+			#reset-cells = <1>;
+		};
+
 		uart0: serial@7040000000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
-- 
2.25.1

[PATCH v2 4/4] riscv: dts: add resets property for uart node

[Chen Wang]

From: Chen Wang <unicorn_wang@outlook.com>

Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index f59081d4f0ee..03266f216021 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -327,6 +327,7 @@ uart0: serial@7040000000 {
 			clock-frequency = <500000000>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&rstgen RST_UART0>;
 			status = "disabled";
 		};
 	};
-- 
2.25.1

Re: [PATCH v2 2/4] reset: sophgo: add SG2042 reset generator driver

[Philipp Zabel]

On Do, 2024-01-25 at 14:11 +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@outlook.com>
> 
> Reuse reset-simple driver for the Sophgo SG2042 reset generator.

Subject prefix should be "reset: simple: "

> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
>  drivers/reset/Kconfig        |  1 +
>  drivers/reset/reset-simple.c |  2 ++
>  drivers/reset/sophgo/Kconfig | 10 ++++++++++
>  3 files changed, 13 insertions(+)
>  create mode 100644 drivers/reset/sophgo/Kconfig
> 
[...]
> diff --git a/drivers/reset/sophgo/Kconfig b/drivers/reset/sophgo/Kconfig
> new file mode 100644
> index 000000000000..9ad96e49e1dd
> --- /dev/null
> +++ b/drivers/reset/sophgo/Kconfig
> @@ -0,0 +1,10 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +
> +config RESET_SOPHGO_SG2042
> +	bool "Sophgo SG2042 Reset Driver"
> +	depends on ARCH_SOPHGO || COMPILE_TEST
> +	select RESET_SIMPLE
> +	default ARCH_SOPHGO
> +	help
> +	  This enables the reset controller driver for the Sophgo SG2042 SoC.
> +

Drop the Kconfig, just add a default y if ARCH_SOPHGO to RESET_SIMPLE.

regards
Philipp

Re: [PATCH v2 2/4] reset: sophgo: add SG2042 reset generator driver

[Chen Wang]

On 2024/1/25 18:43, Philipp Zabel wrote:
> On Do, 2024-01-25 at 14:11 +0800, Chen Wang wrote:
>> From: Chen Wang <unicorn_wang@outlook.com>
>>
>> Reuse reset-simple driver for the Sophgo SG2042 reset generator.
> Subject prefix should be "reset: simple: "
Ok.
>
>> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
>> ---
>>   drivers/reset/Kconfig        |  1 +
>>   drivers/reset/reset-simple.c |  2 ++
>>   drivers/reset/sophgo/Kconfig | 10 ++++++++++
>>   3 files changed, 13 insertions(+)
>>   create mode 100644 drivers/reset/sophgo/Kconfig
>>
> [...]
>> diff --git a/drivers/reset/sophgo/Kconfig b/drivers/reset/sophgo/Kconfig
>> new file mode 100644
>> index 000000000000..9ad96e49e1dd
>> --- /dev/null
>> +++ b/drivers/reset/sophgo/Kconfig
>> @@ -0,0 +1,10 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +
>> +config RESET_SOPHGO_SG2042
>> +	bool "Sophgo SG2042 Reset Driver"
>> +	depends on ARCH_SOPHGO || COMPILE_TEST
>> +	select RESET_SIMPLE
>> +	default ARCH_SOPHGO
>> +	help
>> +	  This enables the reset controller driver for the Sophgo SG2042 SoC.
>> +
> Drop the Kconfig, just add a default y if ARCH_SOPHGO to RESET_SIMPLE.

hi，Philipp,

The purpose of my adding Kconfig is to consider that other socs under 
sophgo may not use RESET_SIMPLE. I'm worried that the coverage is too 
large when default y if ARCH_SOPHGO? What do you think?

Thanks,

Chen

>
> regards
> Philipp

Re: [PATCH v2 2/4] reset: sophgo: add SG2042 reset generator driver

[Philipp Zabel]

On Do, 2024-01-25 at 20:07 +0800, Chen Wang wrote:
> On 2024/1/25 18:43, Philipp Zabel wrote:
> > On Do, 2024-01-25 at 14:11 +0800, Chen Wang wrote:
> > > From: Chen Wang <unicorn_wang@outlook.com>
> > > 
> > > Reuse reset-simple driver for the Sophgo SG2042 reset generator.
> > Subject prefix should be "reset: simple: "
> Ok.
> > 
> > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> > > ---
> > >   drivers/reset/Kconfig        |  1 +
> > >   drivers/reset/reset-simple.c |  2 ++
> > >   drivers/reset/sophgo/Kconfig | 10 ++++++++++
> > >   3 files changed, 13 insertions(+)
> > >   create mode 100644 drivers/reset/sophgo/Kconfig
> > > 
> > [...]
> > > diff --git a/drivers/reset/sophgo/Kconfig b/drivers/reset/sophgo/Kconfig
> > > new file mode 100644
> > > index 000000000000..9ad96e49e1dd
> > > --- /dev/null
> > > +++ b/drivers/reset/sophgo/Kconfig
> > > @@ -0,0 +1,10 @@
> > > +# SPDX-License-Identifier: GPL-2.0-only
> > > +
> > > +config RESET_SOPHGO_SG2042
> > > +	bool "Sophgo SG2042 Reset Driver"
> > > +	depends on ARCH_SOPHGO || COMPILE_TEST
> > > +	select RESET_SIMPLE
> > > +	default ARCH_SOPHGO
> > > +	help
> > > +	  This enables the reset controller driver for the Sophgo SG2042 SoC.
> > > +
> > Drop the Kconfig, just add a default y if ARCH_SOPHGO to RESET_SIMPLE.
> 
> hi，Philipp,
> 
> The purpose of my adding Kconfig is to consider that other socs under 
> sophgo may not use RESET_SIMPLE. I'm worried that the coverage is too 
> large when default y if ARCH_SOPHGO? What do you think?

If ARCH_SOPHGO coverage is considered too wide, it's not correct to
make RESET_SOPHGO_SG2024 "default ARCH_SOPHGO" either, so there's no
significant difference.

The question is whether you need it at all. Can SG2042 boot, possibly
with reduced functionality, into a useful system without the reset
controller? If so, maybe it is enough to rely on a defconfig to enable
RESET_SIMPLE? Otherwise, reset-simple could be considered small enough
to accept carrying it around for non-SG2042 SoCs by default, it can be
disabled manually, after all.

regards
Philipp