From: Binbin Zhou <zhoubinbin@loongson.cn>
To: "Binbin Zhou" <zhoubb.aaron@gmail.com>,
"Huacai Chen" <chenhuacai@loongson.cn>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
"Juxin Gao" <gaojuxin@loongson.cn>
Cc: Huacai Chen <chenhuacai@kernel.org>,
Xuerui Wang <kernel@xen0n.name>,
loongarch@lists.linux.dev, devicetree@vger.kernel.org,
linux-pwm@vger.kernel.org, Binbin Zhou <zhoubinbin@loongson.cn>
Subject: [PATCH v10 0/2] pwm: Introduce pwm driver for the Loongson family chips
Date: Mon, 31 Mar 2025 14:53:48 +0800 [thread overview]
Message-ID: <cover.1743403075.git.zhoubinbin@loongson.cn> (raw)
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Hi all:
This patchset introduce a generic PWM framework driver for Loongson family.
Each PWM has one pulse width output signal and one pulse input signal to be measured.
It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.
Thanks.
-------
V10:
patch (1/2):
- Put my s-o-b tag last;
- Add \n between the includes and the dt node.
patch (2/2):
- Put my s-o-b tag last;
- Add comment about the hardware complete the currently running period
when changing settings or disabling;
- Add _REG to the prefix of the register field definitions, such as
LOONGSON_PWM_CTRL_EN -> LOONGSON_PWM_CTRL_REG_EN;
- Mark to_pwm_loongson_ddata function as __pure;
- Handling "ddata->clk_rate" assertions in probe;
- To guarantee that mul_u64_u64_div_u64() results in a value that fits into an u32.
Link to V9:
https://lore.kernel.org/all/cover.1739784071.git.zhoubinbin@loongson.cn/
V9:
patch(2/2):
- Add error message to devm_clk_rate_exclusive_get();
- Make all errors start with a capital letter;
- Drop explicit initialization of the CTRL register in probe();
- Add pwm->state.enabled check in pwm_loongson_suspend();
- Drop pwm_loongson_suspend_store{ }.
Link to V8:
https://lore.kernel.org/all/cover.1733823417.git.zhoubinbin@loongson.cn/
V8:
patch (2/2):
- Rebase on pwm/for-next;
- Drop inappropriate comments in “Limitations”;
- Drop HZ_PER_KHZ for readability;
- NANOHZ_PER_HZ -> NSEC_PER_SEC;
- Rewrite the clk fetch section to look more flexible and not have to
care about ACPI or DT;
- Add explicit initialization of the CTRL register in probe().
Link to V7:
https://lore.kernel.org/all/cover.1729583747.git.zhoubinbin@loongson.cn/
V7:
Thanks for Sean's advice.
patch (2/2):
- Set chip->atomic to keep pwm_apply_atomic() can be used with the pwm.
- Test with CONFIG_PWM_DEBUG and CONFIG_DEBUG_ATOMIC_SLEEP enabled.
Link to V6:
https://lore.kernel.org/all/cover.1728463622.git.zhoubinbin@loongson.cn/
V6:
patch (2/2):
- Rebase on pwm/for-next;
- Add Reference Manual;
- Shortcut if !pwm->state.enabled;
- When state->enabled is true, unconditionally execute
pwm_loongson_set_polarity() to avoid that the polarity register is
not set correctly.
Link to V5:
https://lore.kernel.org/all/cover.1720516327.git.zhoubinbin@loongson.cn/
V5:
patch (2/2):
- Rebase on pwm/for-next;
- Test with PWM_DEBUG enabled.
- In pwm_loongson_apply(), the pwm state is determined before the pwm
polarity, avoid test failures when PWM_DEBUG is enabled;
- Added DIV64_U64_ROUND_UP in pwm_loongson_get_state() to avoid
precision loss and to avoid test failures when PWM_DEBUG is enabled.
Link to V4:
https://lore.kernel.org/all/cover.1716795485.git.zhoubinbin@loongson.cn/
V4:
patch (2/2):
- Rebase on pwm/for-next;
- Addressed Uwe's review comments:
- Make use of devm_pwmchip_alloc() function;
- Add Limitations description;
- Add LOONGSON_ prefix for Loongson pwm register defines;
- Keep regs written only once;
- Rewrite duty/period calculation;
- Add dev_err_probe() in .probe();
- Fix some code style.
Link to V3:
https://lore.kernel.org/linux-pwm/cover.1713164810.git.zhoubinbin@loongson.cn/
V3:
patch (1/2):
- Add Reviewed-by tag from Krzysztof, thanks.
patch (2/2):
- Several code stlye adjustments, such as line breaks.
Link to V2:
https://lore.kernel.org/all/cover.1712732719.git.zhoubinbin@loongson.cn/
v2:
- Remove the dts-related patches and update dts at once after all
relevant drivers are complete.
patch (1/2):
- The dt-binding filename should match compatible, rename it as
loongson,ls7a-pwm.yaml;
- Update binding description;
- Add description for each pwm cell;
- Drop '#pwm-cells' from required, for pwm.yaml makes it required already.
Link to v1:
https://lore.kernel.org/linux-pwm/cover.1711953223.git.zhoubinbin@loongson.cn/
Binbin Zhou (2):
dt-bindings: pwm: Add Loongson PWM controller
pwm: Add Loongson PWM controller support
.../bindings/pwm/loongson,ls7a-pwm.yaml | 67 ++++
MAINTAINERS | 7 +
drivers/pwm/Kconfig | 12 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-loongson.c | 290 ++++++++++++++++++
5 files changed, 377 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml
create mode 100644 drivers/pwm/pwm-loongson.c
base-commit: 6df320abbb40654085d7258de33d78481e93ac8d
--
2.47.1
next reply other threads:[~2025-03-31 6:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 6:53 Binbin Zhou [this message]
2025-03-31 6:53 ` [PATCH v10 1/2] dt-bindings: pwm: Add Loongson PWM controller Binbin Zhou
2025-03-31 6:53 ` [PATCH v10 2/2] pwm: Add Loongson PWM controller support Binbin Zhou
2025-03-31 14:52 ` [PATCH v10 0/2] pwm: Introduce pwm driver for the Loongson family chips Uwe Kleine-König
2025-04-01 1:28 ` Huacai Chen
2025-04-01 5:25 ` Uwe Kleine-König
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